derek.holloway
7502bf64a4
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256 lines
9.6 KiB
LLVM
256 lines
9.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1030 < %s | FileCheck -check-prefix=GFX10 %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1030 < %s | FileCheck -check-prefix=GFX10 %s
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; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1100 < %s | FileCheck -check-prefix=GFX11 %s
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; RUN: llc -global-isel=0 -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX12 %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX12 %s
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; RUN: not llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx900 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR %s
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; RUN: not llc -global-isel=1 -global-isel-abort=0 -mtriple=amdgcn -mcpu=gfx900 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR %s
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; RUN: not llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1010 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR %s
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; RUN: not llc -global-isel=1 -global-isel-abort=0 -mtriple=amdgcn -mcpu=gfx1010 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR %s
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; RUN: not llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx950 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR %s
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; RUN: not llc -global-isel=1 -global-isel-abort=0 -mtriple=amdgcn -mcpu=gfx950 -filetype=null < %s 2>&1 | FileCheck -check-prefix=ERR %s
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; ERR: error: <unknown>:0:0: in function v_fma float (float, float, float): intrinsic not supported on subtarget
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define float @v_fma(float %a, float %b, float %c) {
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; GFX10-LABEL: v_fma:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_fma_legacy_f32 v0, v0, v1, v2
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_fma:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_fma_dx9_zero_f32 v0, v0, v1, v2
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_fma:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_fma_dx9_zero_f32 v0, v0, v1, v2
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%fma = call float @llvm.amdgcn.fma.legacy(float %a, float %b, float %c)
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ret float %fma
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}
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define float @v_fmac(float %a, float %b, float %c) {
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; GFX10-LABEL: v_fmac:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_fmac_legacy_f32_e32 v0, v1, v2
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_fmac:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_fmac_dx9_zero_f32_e32 v0, v1, v2
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_fmac:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_fma_dx9_zero_f32 v0, v1, v2, v0
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%fma = call float @llvm.amdgcn.fma.legacy(float %b, float %c, float %a)
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ret float %fma
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}
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define float @v_fma_imm(float %a, float %c) {
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; GFX10-LABEL: v_fma_imm:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_fma_legacy_f32 v0, 0x41200000, v0, v1
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_fma_imm:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_fma_dx9_zero_f32 v0, 0x41200000, v0, v1
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_fma_imm:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_fma_dx9_zero_f32 v0, 0x41200000, v0, v1
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%fma = call float @llvm.amdgcn.fma.legacy(float %a, float 10.0, float %c)
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ret float %fma
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}
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define float @v_fmac_imm(float %a, float %c) {
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; GFX10-LABEL: v_fmac_imm:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_fmac_legacy_f32_e32 v0, 0x41200000, v1
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_fmac_imm:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_fmac_dx9_zero_f32_e32 v0, 0x41200000, v1
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_fmac_imm:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_fma_dx9_zero_f32 v0, 0x41200000, v1, v0
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%fma = call float @llvm.amdgcn.fma.legacy(float 10.0, float %c, float %a)
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ret float %fma
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}
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define float @v_fabs_fma(float %a, float %b, float %c) {
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; GFX10-LABEL: v_fabs_fma:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_fma_legacy_f32 v0, |v0|, v1, v2
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_fabs_fma:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_fma_dx9_zero_f32 v0, |v0|, v1, v2
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_fabs_fma:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_fma_dx9_zero_f32 v0, |v0|, v1, v2
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%fabs.a = call float @llvm.fabs.f32(float %a)
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%fma = call float @llvm.amdgcn.fma.legacy(float %fabs.a, float %b, float %c)
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ret float %fma
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}
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define float @v_fneg_fabs_fma(float %a, float %b, float %c) {
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; GFX10-LABEL: v_fneg_fabs_fma:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_fma_legacy_f32 v0, v0, -|v1|, v2
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_fneg_fabs_fma:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_fma_dx9_zero_f32 v0, v0, -|v1|, v2
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_fneg_fabs_fma:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_fma_dx9_zero_f32 v0, v0, -|v1|, v2
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%fabs.b = call float @llvm.fabs.f32(float %b)
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%neg.fabs.b = fneg float %fabs.b
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%fma = call float @llvm.amdgcn.fma.legacy(float %a, float %neg.fabs.b, float %c)
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ret float %fma
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}
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define float @v_fneg_fma(float %a, float %b, float %c) {
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; GFX10-LABEL: v_fneg_fma:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_fma_legacy_f32 v0, v0, v1, -v2
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_fneg_fma:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_fma_dx9_zero_f32 v0, v0, v1, -v2
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_fneg_fma:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_fma_dx9_zero_f32 v0, v0, v1, -v2
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%neg.c = fneg float %c
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%fma = call float @llvm.amdgcn.fma.legacy(float %a, float %b, float %neg.c)
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ret float %fma
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}
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define float @v_fma_const_const(float %a) {
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; GFX10-LABEL: v_fma_const_const:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX10-NEXT: v_fma_legacy_f32 v0, v0, 2.0, -1.0
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; GFX10-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX11-LABEL: v_fma_const_const:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX11-NEXT: v_fma_dx9_zero_f32 v0, v0, 2.0, -1.0
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; GFX11-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX12-LABEL: v_fma_const_const:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: v_fma_dx9_zero_f32 v0, v0, 2.0, -1.0
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%fma = call float @llvm.amdgcn.fma.legacy(float %a, float 2.0, float -1.0)
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ret float %fma
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}
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define amdgpu_ps float @v_fma_sss(float inreg %a, float inreg %b, float inreg %c) {
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; GFX10-LABEL: v_fma_sss:
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; GFX10: ; %bb.0:
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; GFX10-NEXT: v_mov_b32_e32 v0, s4
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; GFX10-NEXT: v_fma_legacy_f32 v0, s3, s2, v0
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; GFX10-NEXT: ; return to shader part epilog
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;
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; GFX11-LABEL: v_fma_sss:
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; GFX11: ; %bb.0:
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; GFX11-NEXT: v_mov_b32_e32 v0, s4
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; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX11-NEXT: v_fma_dx9_zero_f32 v0, s3, s2, v0
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; GFX11-NEXT: ; return to shader part epilog
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;
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; GFX12-LABEL: v_fma_sss:
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; GFX12: ; %bb.0:
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; GFX12-NEXT: v_mov_b32_e32 v0, s4
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; GFX12-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX12-NEXT: v_fma_dx9_zero_f32 v0, s2, s3, v0
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; GFX12-NEXT: ; return to shader part epilog
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%fma = call float @llvm.amdgcn.fma.legacy(float %a, float %b, float %c)
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ret float %fma
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}
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declare float @llvm.amdgcn.fma.legacy(float, float, float)
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declare float @llvm.fabs.f32(float)
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