derek.holloway
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111 lines
4.6 KiB
LLVM
111 lines
4.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64 < %s | FileCheck -check-prefix=GFX12 %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -global-isel-abort=2 -mtriple=amdgcn -mcpu=gfx1200 -mattr=+wavefrontsize64 < %s | FileCheck -check-prefix=GFX12 %s
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declare i32 @llvm.amdgcn.global.load.tr.b64.i32.p1(ptr addrspace(1))
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declare <4 x i16> @llvm.amdgcn.global.load.tr.b128.v4i16.p1(ptr addrspace(1))
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declare <4 x half> @llvm.amdgcn.global.load.tr.b128.v4f16.p1(ptr addrspace(1))
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declare <4 x bfloat> @llvm.amdgcn.global.load.tr.b128.v4bf16.p1(ptr addrspace(1))
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define amdgpu_kernel void @global_load_tr_b64_i32(ptr addrspace(1) %addr, ptr addrspace(1) %use) {
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; GFX12-LABEL: global_load_tr_b64_i32:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX12-NEXT: v_mov_b32_e32 v0, 0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: global_load_tr_b64 v1, v0, s[0:1] offset:32
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: global_store_b32 v0, v1, s[2:3]
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; GFX12-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call i32 @llvm.amdgcn.global.load.tr.b64.i32.p1(ptr addrspace(1) %gep)
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store i32 %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_kernel void @global_load_tr_b128_v4i16(ptr addrspace(1) %addr, ptr addrspace(1) %use) {
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; GFX12-LABEL: global_load_tr_b128_v4i16:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX12-NEXT: v_mov_b32_e32 v2, 0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: global_load_tr_b128 v[0:1], v2, s[0:1] offset:32
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: global_store_b64 v2, v[0:1], s[2:3]
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; GFX12-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <4 x i16> @llvm.amdgcn.global.load.tr.b128.v4i16.p1(ptr addrspace(1) %gep)
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store <4 x i16> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_kernel void @global_load_tr_b128_v4f16(ptr addrspace(1) %addr, ptr addrspace(1) %use) {
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; GFX12-LABEL: global_load_tr_b128_v4f16:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX12-NEXT: v_mov_b32_e32 v2, 0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: global_load_tr_b128 v[0:1], v2, s[0:1] offset:32
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: global_store_b64 v2, v[0:1], s[2:3]
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; GFX12-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <4 x half> @llvm.amdgcn.global.load.tr.b128.v4f16.p1(ptr addrspace(1) %gep)
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store <4 x half> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_kernel void @global_load_tr_b128_v4bf16(ptr addrspace(1) %addr, ptr addrspace(1) %use) {
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; GFX12-LABEL: global_load_tr_b128_v4bf16:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
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; GFX12-NEXT: v_mov_b32_e32 v2, 0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: global_load_tr_b128 v[0:1], v2, s[0:1] offset:32
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: global_store_b64 v2, v[0:1], s[2:3]
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; GFX12-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <4 x bfloat> @llvm.amdgcn.global.load.tr.b128.v4bf16.p1(ptr addrspace(1) %gep)
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store <4 x bfloat> %val, ptr addrspace(1) %use
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ret void
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}
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define i32 @global_load_tr_b64_i32_vaddr(ptr addrspace(1) %addr) {
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; GFX12-LABEL: global_load_tr_b64_i32_vaddr:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: global_load_tr_b64 v0, v[0:1], off offset:32
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call i32 @llvm.amdgcn.global.load.tr.b64.i32.p1(ptr addrspace(1) %gep)
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ret i32 %val
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}
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define <4 x i16> @global_load_tr_b128_v4i16_vaddr(ptr addrspace(1) %addr) {
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; GFX12-LABEL: global_load_tr_b128_v4i16_vaddr:
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; GFX12: ; %bb.0: ; %entry
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; GFX12-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX12-NEXT: s_wait_expcnt 0x0
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; GFX12-NEXT: s_wait_samplecnt 0x0
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; GFX12-NEXT: s_wait_bvhcnt 0x0
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; GFX12-NEXT: s_wait_kmcnt 0x0
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; GFX12-NEXT: global_load_tr_b128 v[0:1], v[0:1], off offset:32
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; GFX12-NEXT: s_wait_loadcnt 0x0
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <4 x i16> @llvm.amdgcn.global.load.tr.b128.v4i16.p1(ptr addrspace(1) %gep)
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ret <4 x i16> %val
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}
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