derek.holloway
7502bf64a4
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247 lines
12 KiB
LLVM
247 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-SDAG %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250,GFX1250-GISEL %s
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declare i32 @llvm.amdgcn.global.load.monitor.b32.i32(ptr addrspace(1), i32, metadata)
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declare <2 x i32> @llvm.amdgcn.global.load.monitor.b64.v2i32(ptr addrspace(1), i32, metadata)
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declare <4 x i32> @llvm.amdgcn.global.load.monitor.b128.v4i32(ptr addrspace(1), i32, metadata)
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declare i32 @llvm.amdgcn.flat.load.monitor.b32.i32(ptr, i32, metadata)
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declare <2 x i32> @llvm.amdgcn.flat.load.monitor.b64.v2i32(ptr, i32, metadata)
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declare <4 x i32> @llvm.amdgcn.flat.load.monitor.b128.v4i32(ptr, i32, metadata)
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define amdgpu_ps void @global_load_monitor_b32_vaddr_relaxed_sys(ptr addrspace(1) %addr, ptr addrspace(1) %use) {
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; GFX1250-LABEL: global_load_monitor_b32_vaddr_relaxed_sys:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: global_load_monitor_b32 v0, v[0:1], off offset:32 scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b32 v[2:3], v0, off
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; GFX1250-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call i32 @llvm.amdgcn.global.load.monitor.b32.i32(ptr addrspace(1) %gep, i32 0, metadata !0)
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store i32 %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @global_load_monitor_b32_saddr_relaxed_sys(ptr addrspace(1) inreg %addr, ptr addrspace(1) %use) {
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; GFX1250-LABEL: global_load_monitor_b32_saddr_relaxed_sys:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: v_mov_b32_e32 v2, 0
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; GFX1250-NEXT: global_load_monitor_b32 v2, v2, s[0:1] offset:32 scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b32 v[0:1], v2, off
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; GFX1250-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call i32 @llvm.amdgcn.global.load.monitor.b32.i32(ptr addrspace(1) %gep, i32 0, metadata !0)
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store i32 %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @global_load_monitor_b64_vaddr_acquire_agent(ptr addrspace(1) %addr, ptr addrspace(1) %use) {
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; GFX1250-LABEL: global_load_monitor_b64_vaddr_acquire_agent:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: global_load_monitor_b64 v[0:1], v[0:1], off offset:32 scope:SCOPE_DEV
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_DEV
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b64 v[2:3], v[0:1], off
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; GFX1250-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <2 x i32> @llvm.amdgcn.global.load.monitor.b64.v2i32(ptr addrspace(1) %gep, i32 2, metadata !1)
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store <2 x i32> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @global_load_monitor_b64_saddr_acquire_agent(ptr addrspace(1) inreg %addr, ptr addrspace(1) %use) {
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; GFX1250-LABEL: global_load_monitor_b64_saddr_acquire_agent:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: v_mov_b32_e32 v2, 0
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; GFX1250-NEXT: global_load_monitor_b64 v[2:3], v2, s[0:1] offset:32 scope:SCOPE_DEV
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_DEV
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b64 v[0:1], v[2:3], off
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; GFX1250-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <2 x i32> @llvm.amdgcn.global.load.monitor.b64.v2i32(ptr addrspace(1) %gep, i32 2, metadata !1)
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store <2 x i32> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @global_load_monitor_b128_vaddr_seq_cst_workgroup(ptr addrspace(1) %addr, ptr addrspace(1) %use) {
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; GFX1250-LABEL: global_load_monitor_b128_vaddr_seq_cst_workgroup:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: global_load_monitor_b128 v[4:7], v[0:1], off offset:32
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b128 v[2:3], v[4:7], off
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; GFX1250-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <4 x i32> @llvm.amdgcn.global.load.monitor.b128.v4i32(ptr addrspace(1) %gep, i32 5, metadata !2)
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store <4 x i32> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @global_load_monitor_b128_saddr_seq_cst_workgroup(ptr addrspace(1) inreg %addr, ptr addrspace(1) %use) {
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; GFX1250-LABEL: global_load_monitor_b128_saddr_seq_cst_workgroup:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: v_mov_b32_e32 v2, 0
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; GFX1250-NEXT: global_load_monitor_b128 v[2:5], v2, s[0:1] offset:32
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b128 v[0:1], v[2:5], off
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; GFX1250-NEXT: s_endpgm
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entry:
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%gep = getelementptr i64, ptr addrspace(1) %addr, i32 4
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%val = call <4 x i32> @llvm.amdgcn.global.load.monitor.b128.v4i32(ptr addrspace(1) %gep, i32 5, metadata !2)
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store <4 x i32> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @flat_load_monitor_b32_seq_cst_sys(ptr %addr, ptr addrspace(1) %use) {
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; GFX1250-LABEL: flat_load_monitor_b32_seq_cst_sys:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: flat_load_monitor_b32 v0, v[0:1] offset:32 scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b32 v[2:3], v0, off
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; GFX1250-NEXT: s_endpgm
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entry:
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%gep = getelementptr inbounds i64, ptr addrspace(0) %addr, i32 4
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%val = call i32 @llvm.amdgcn.flat.load.monitor.b32.i32(ptr addrspace(0) %gep, i32 5, metadata !0)
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store i32 %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @flat_load_monitor_b64_seq_cst_agent(ptr %addr, ptr addrspace(1) %use) {
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; GFX1250-LABEL: flat_load_monitor_b64_seq_cst_agent:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: flat_load_monitor_b64 v[0:1], v[0:1] offset:32 scope:SCOPE_DEV
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_DEV
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b64 v[2:3], v[0:1], off
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; GFX1250-NEXT: s_endpgm
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entry:
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%gep = getelementptr inbounds i64, ptr addrspace(0) %addr, i32 4
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%val = call <2 x i32> @llvm.amdgcn.flat.load.monitor.b64.v2i32(ptr addrspace(0) %gep, i32 5, metadata !1)
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store <2 x i32> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @flat_load_monitor_b128_acquire_sys(ptr %addr, ptr addrspace(1) %use) {
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; GFX1250-LABEL: flat_load_monitor_b128_acquire_sys:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: flat_load_monitor_b128 v[4:7], v[0:1] offset:32 scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b128 v[2:3], v[4:7], off
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; GFX1250-NEXT: s_endpgm
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entry:
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%gep = getelementptr inbounds i64, ptr addrspace(0) %addr, i32 4
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%val = call <4 x i32> @llvm.amdgcn.flat.load.monitor.b128.v4i32(ptr addrspace(0) %gep, i32 2, metadata !0)
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store <4 x i32> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @global_load_monitor_b32_saddr_scale_offset_acquire_agent(ptr addrspace(1) inreg %addr, ptr addrspace(1) %use, i32 %idx) {
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; GFX1250-LABEL: global_load_monitor_b32_saddr_scale_offset_acquire_agent:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: global_load_monitor_b32 v2, v2, s[0:1] scale_offset scope:SCOPE_DEV
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_DEV
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b32 v[0:1], v2, off
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; GFX1250-NEXT: s_endpgm
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entry:
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%idxprom = sext i32 %idx to i64
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%gep = getelementptr i32, ptr addrspace(1) %addr, i64 %idxprom
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%val = call i32 @llvm.amdgcn.global.load.monitor.b32.i32(ptr addrspace(1) %gep, i32 2, metadata !1)
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store i32 %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @global_load_monitor_b64_saddr_scale_offset_acquire_workgroup(ptr addrspace(1) inreg %addr, ptr addrspace(1) %use, i32 %idx) {
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; GFX1250-LABEL: global_load_monitor_b64_saddr_scale_offset_acquire_workgroup:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: global_load_monitor_b64 v[2:3], v2, s[0:1] scale_offset
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b64 v[0:1], v[2:3], off
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; GFX1250-NEXT: s_endpgm
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entry:
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%idxprom = sext i32 %idx to i64
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%gep = getelementptr i64, ptr addrspace(1) %addr, i64 %idxprom
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%val = call <2 x i32> @llvm.amdgcn.global.load.monitor.b64.v2i32(ptr addrspace(1) %gep, i32 2, metadata !2)
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store <2 x i32> %val, ptr addrspace(1) %use
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ret void
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}
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define amdgpu_ps void @global_load_monitor_b64_saddr_no_scale_offset_seq_cst_sys(ptr addrspace(1) inreg %addr, ptr addrspace(1) %use, i32 %idx) {
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; GFX1250-LABEL: global_load_monitor_b64_saddr_no_scale_offset_seq_cst_sys:
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; GFX1250: ; %bb.0: ; %entry
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; GFX1250-NEXT: global_prefetch_b8 v0, s[0:1] scope:SCOPE_SE
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; GFX1250-NEXT: v_nop
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; GFX1250-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_WAVE_MODE, 25, 1), 1 ; msbs: dst=0 src0=0 src1=0 src2=0
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; GFX1250-NEXT: v_ashrrev_i32_e32 v3, 31, v2
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; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-NEXT: v_lshl_add_u64 v[2:3], v[2:3], 2, s[0:1]
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; GFX1250-NEXT: global_load_monitor_b64 v[2:3], v[2:3], off scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_inv scope:SCOPE_SYS
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; GFX1250-NEXT: s_wait_loadcnt 0x0
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; GFX1250-NEXT: global_store_b64 v[0:1], v[2:3], off
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; GFX1250-NEXT: s_endpgm
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entry:
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%idxprom = sext i32 %idx to i64
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%gep = getelementptr i32, ptr addrspace(1) %addr, i64 %idxprom
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%val = call <2 x i32> @llvm.amdgcn.global.load.monitor.b64.v2i32(ptr addrspace(1) %gep, i32 5, metadata !0)
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store <2 x i32> %val, ptr addrspace(1) %use
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ret void
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}
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!0 = !{ !"" }
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!1 = !{ !"agent" }
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!2 = !{ !"workgroup" }
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; GFX1250-GISEL: {{.*}}
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; GFX1250-SDAG: {{.*}}
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