derek.holloway
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104 lines
4.2 KiB
LLVM
104 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250 %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck -check-prefixes=GFX1250 %s
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; RUN: llc -global-isel=0 -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1310 < %s | FileCheck -check-prefixes=GFX13 %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -amdgpu-load-store-vectorizer=0 -mtriple=amdgcn -mcpu=gfx1310 < %s | FileCheck -check-prefixes=GFX13 %s
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define i32 @v_permlane_idx_gen_b32_vs(i32 %src0, i32 %src1) {
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; GFX1250-LABEL: v_permlane_idx_gen_b32_vs:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: v_readfirstlane_b32 s0, v1
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; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX1250-NEXT: v_permlane_idx_gen_b32 v0, v0, s0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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;
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; GFX13-LABEL: v_permlane_idx_gen_b32_vs:
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; GFX13: ; %bb.0:
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; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX13-NEXT: s_wait_expcnt 0x0
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; GFX13-NEXT: s_wait_samplecnt 0x0
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; GFX13-NEXT: s_wait_bvhcnt 0x0
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; GFX13-NEXT: s_wait_kmcnt 0x0
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; GFX13-NEXT: v_readfirstlane_b32 s0, v1
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; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_1)
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; GFX13-NEXT: v_permlane_idx_gen_b32 v0, v0, s0
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; GFX13-NEXT: s_set_pc_i64 s[30:31]
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%v = call i32 @llvm.amdgcn.permlane.idx.gen(i32 %src0, i32 %src1)
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ret i32 %v
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}
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define i32 @v_permlane_idx_gen_b32_vi(i32 %src0) {
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; GFX1250-LABEL: v_permlane_idx_gen_b32_vi:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: v_permlane_idx_gen_b32 v0, v0, 1
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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;
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; GFX13-LABEL: v_permlane_idx_gen_b32_vi:
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; GFX13: ; %bb.0:
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; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX13-NEXT: s_wait_expcnt 0x0
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; GFX13-NEXT: s_wait_samplecnt 0x0
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; GFX13-NEXT: s_wait_bvhcnt 0x0
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; GFX13-NEXT: s_wait_kmcnt 0x0
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; GFX13-NEXT: v_permlane_idx_gen_b32 v0, v0, 1
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; GFX13-NEXT: s_set_pc_i64 s[30:31]
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%v = call i32 @llvm.amdgcn.permlane.idx.gen(i32 %src0, i32 1)
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ret i32 %v
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}
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define i32 @v_permlane_idx_gen_b32_vl(i32 %src0) {
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; GFX1250-LABEL: v_permlane_idx_gen_b32_vl:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: v_permlane_idx_gen_b32 v0, v0, 0x64
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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;
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; GFX13-LABEL: v_permlane_idx_gen_b32_vl:
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; GFX13: ; %bb.0:
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; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX13-NEXT: s_wait_expcnt 0x0
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; GFX13-NEXT: s_wait_samplecnt 0x0
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; GFX13-NEXT: s_wait_bvhcnt 0x0
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; GFX13-NEXT: s_wait_kmcnt 0x0
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; GFX13-NEXT: v_permlane_idx_gen_b32 v0, v0, 0x64
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; GFX13-NEXT: s_set_pc_i64 s[30:31]
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%v = call i32 @llvm.amdgcn.permlane.idx.gen(i32 %src0, i32 100)
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ret i32 %v
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}
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define i32 @v_permlane_idx_gen_b32_vv() {
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; GFX1250-LABEL: v_permlane_idx_gen_b32_vv:
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; GFX1250: ; %bb.0:
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; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX1250-NEXT: s_wait_kmcnt 0x0
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; GFX1250-NEXT: v_bfe_u32 v0, v31, 10, 10
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; GFX1250-NEXT: v_and_b32_e32 v1, 0x3ff, v31
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; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
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; GFX1250-NEXT: v_readfirstlane_b32 s0, v0
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; GFX1250-NEXT: v_permlane_idx_gen_b32 v0, v1, s0
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; GFX1250-NEXT: s_set_pc_i64 s[30:31]
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;
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; GFX13-LABEL: v_permlane_idx_gen_b32_vv:
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; GFX13: ; %bb.0:
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; GFX13-NEXT: s_wait_loadcnt_dscnt 0x0
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; GFX13-NEXT: s_wait_expcnt 0x0
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; GFX13-NEXT: s_wait_samplecnt 0x0
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; GFX13-NEXT: s_wait_bvhcnt 0x0
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; GFX13-NEXT: s_wait_kmcnt 0x0
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; GFX13-NEXT: v_bfe_u32 v0, v31, 10, 10
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; GFX13-NEXT: v_and_b32_e32 v1, 0x3ff, v31
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; GFX13-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
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; GFX13-NEXT: v_readfirstlane_b32 s0, v0
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; GFX13-NEXT: v_permlane_idx_gen_b32 v0, v1, s0
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; GFX13-NEXT: s_set_pc_i64 s[30:31]
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%tidx = call i32 @llvm.amdgcn.workitem.id.x()
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%tidy = call i32 @llvm.amdgcn.workitem.id.y()
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%v = call i32 @llvm.amdgcn.permlane.idx.gen(i32 %tidx, i32 %tidy)
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ret i32 %v
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}
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