derek.holloway
7502bf64a4
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40 lines
1.5 KiB
LLVM
40 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "s_mov" --version 6
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=GFX8 %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=GFX8 %s
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; RUN: llc -global-isel=0 -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefix=GFX12PLUS %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1200 -amdgpu-enable-delay-alu=0 < %s | FileCheck -check-prefix=GFX12PLUS %s
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declare i32 @llvm.amdgcn.sffbh.i32(i32) #1
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define amdgpu_ps i32 @s_sffbh(i32 inreg %val) {
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; GFX8-LABEL: s_sffbh:
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; GFX8: ; %bb.0:
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; GFX8: s_flbit_i32 s0, s0
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; GFX8: ; return to shader part epilog
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;
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; GFX12PLUS-LABEL: s_sffbh:
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; GFX12PLUS: ; %bb.0:
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; GFX12PLUS: s_cls_i32 s0, s0
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; GFX12PLUS: ; return to shader part epilog
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%r = call i32 @llvm.amdgcn.sffbh.i32(i32 %val)
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ret i32 %r
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}
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define amdgpu_ps i32 @v_sffbh(i32 %val) {
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; GFX8-LABEL: v_sffbh:
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; GFX8: ; %bb.0:
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; GFX8: v_ffbh_i32_e32 v0, v0
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; GFX8: v_readfirstlane_b32 s0, v0
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; GFX8: ; return to shader part epilog
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;
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; GFX12PLUS-LABEL: v_sffbh:
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; GFX12PLUS: ; %bb.0:
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; GFX12PLUS: v_cls_i32_e32 v0, v0
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; GFX12PLUS: v_readfirstlane_b32 s0, v0
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; GFX12PLUS: ; return to shader part epilog
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%r = call i32 @llvm.amdgcn.sffbh.i32(i32 %val)
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ret i32 %r
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}
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attributes #1 = { nounwind readnone }
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