derek.holloway
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89 lines
3.2 KiB
LLVM
89 lines
3.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=fiji < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -global-isel=1 -new-reg-bank-select -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1200 < %s | FileCheck -check-prefix=GFX12 %s
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define float @v_sqrt_f32(float %src) {
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; GCN-LABEL: v_sqrt_f32:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sqrt_f32_e32 v0, v0
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%sqrt = call float @llvm.amdgcn.sqrt.f32(float %src)
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ret float %sqrt
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}
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define float @v_fabs_sqrt_f32(float %src) {
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; GCN-LABEL: v_fabs_sqrt_f32:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sqrt_f32_e64 v0, |v0|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call float @llvm.fabs.f32(float %src)
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%sqrt = call float @llvm.amdgcn.sqrt.f32(float %fabs.src)
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ret float %sqrt
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}
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define float @v_fneg_fabs_sqrt_f32(float %src) {
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; GCN-LABEL: v_fneg_fabs_sqrt_f32:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sqrt_f32_e64 v0, -|v0|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call float @llvm.fabs.f32(float %src)
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%neg.fabs.src = fneg float %fabs.src
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%sqrt = call float @llvm.amdgcn.sqrt.f32(float %neg.fabs.src)
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ret float %sqrt
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}
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define double @v_sqrt_f64(double %src) {
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; GCN-LABEL: v_sqrt_f64:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sqrt_f64_e32 v[0:1], v[0:1]
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%sqrt = call double @llvm.amdgcn.sqrt.f64(double %src)
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ret double %sqrt
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}
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define double @v_fabs_sqrt_f64(double %src) {
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; GCN-LABEL: v_fabs_sqrt_f64:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sqrt_f64_e64 v[0:1], |v[0:1]|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call double @llvm.fabs.f64(double %src)
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%sqrt = call double @llvm.amdgcn.sqrt.f64(double %fabs.src)
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ret double %sqrt
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}
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define double @v_fneg_fabs_sqrt_f64(double %src) {
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; GCN-LABEL: v_fneg_fabs_sqrt_f64:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_sqrt_f64_e64 v[0:1], -|v[0:1]|
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%fabs.src = call double @llvm.fabs.f64(double %src)
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%neg.fabs.src = fneg double %fabs.src
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%sqrt = call double @llvm.amdgcn.sqrt.f64(double %neg.fabs.src)
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ret double %sqrt
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}
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define double @s_sqrt_f64(double inreg %src) {
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; GFX12-LABEL: s_sqrt_f64:
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; GFX12: ; %bb.0:
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; GFX12: v_sqrt_f64_e32 v[0:1], s[0:1]
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; GFX12-NEXT: s_setpc_b64 s[30:31]
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%sqrt = call double @llvm.amdgcn.sqrt.f64(double %src)
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ret double %sqrt
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}
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declare float @llvm.amdgcn.sqrt.f32(float) #0
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declare double @llvm.amdgcn.sqrt.f64(double) #0
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declare float @llvm.fabs.f32(float) #0
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declare double @llvm.fabs.f64(double) #0
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attributes #0 = { nounwind readnone speculatable willreturn }
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