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111 lines
4.1 KiB
LLVM
111 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -amdgpu-spill-cfi-saved-regs < %s | FileCheck %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx908 -amdgpu-spill-cfi-saved-regs < %s | FileCheck %s
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; Function Attrs: noinline optnone
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define fastcc void @tail_callee() #2 {
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; CHECK-LABEL: tail_callee:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b64 s[4:5], exec
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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ret void
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}
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; Function Attrs: noinline
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define fastcc void @callee_no_fp() #0 {
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; CHECK-LABEL: callee_no_fp:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b32 s20, s33
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; CHECK-NEXT: s_mov_b32 s33, s32
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; CHECK-NEXT: s_xor_saveexec_b64 s[16:17], -1
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; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s33 ; 4-byte Folded Spill
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; CHECK-NEXT: s_mov_b64 exec, s[16:17]
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; CHECK-NEXT: s_mov_b64 s[18:19], exec
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; CHECK-NEXT: v_writelane_b32 v0, s30, 0
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; CHECK-NEXT: s_addk_i32 s32, 0x400
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; CHECK-NEXT: v_writelane_b32 v0, s31, 1
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; CHECK-NEXT: s_getpc_b64 s[16:17]
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; CHECK-NEXT: s_add_u32 s16, s16, tail_callee@gotpcrel32@lo+4
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; CHECK-NEXT: s_addc_u32 s17, s17, tail_callee@gotpcrel32@hi+12
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; CHECK-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]
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entry:
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tail call fastcc void @tail_callee() #3
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unreachable
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}
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define protected amdgpu_kernel void @kernel() #1 {
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; CHECK-LABEL: kernel:
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; CHECK: ; %bb.0: ; %entry
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; CHECK-NEXT: s_add_u32 flat_scratch_lo, s12, s17
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; CHECK-NEXT: s_addc_u32 flat_scratch_hi, s13, 0
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; CHECK-NEXT: s_add_u32 s0, s0, s17
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; CHECK-NEXT: s_addc_u32 s1, s1, 0
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; CHECK-NEXT: s_mov_b32 s32, 0
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; CHECK-NEXT: s_cbranch_scc0 .LBB2_2
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; CHECK-NEXT: ; %bb.1: ; %end
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; CHECK-NEXT: s_endpgm
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; CHECK-NEXT: .LBB2_2: ; %body
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; CHECK-NEXT: s_getpc_b64 s[12:13]
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; CHECK-NEXT: s_add_u32 s12, s12, callee_no_fp@gotpcrel32@lo+4
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; CHECK-NEXT: s_addc_u32 s13, s13, callee_no_fp@gotpcrel32@hi+12
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; CHECK-NEXT: s_load_dwordx2 s[18:19], s[12:13], 0x0
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; CHECK-NEXT: v_lshlrev_b32_e32 v2, 20, v2
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; CHECK-NEXT: v_lshlrev_b32_e32 v1, 10, v1
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; CHECK-NEXT: v_or3_b32 v31, v0, v1, v2
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; CHECK-NEXT: s_mov_b32 s12, s14
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; CHECK-NEXT: s_mov_b32 s13, s15
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; CHECK-NEXT: s_mov_b32 s14, s16
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; CHECK-NEXT: s_waitcnt lgkmcnt(0)
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; CHECK-NEXT: s_swappc_b64 s[30:31], s[18:19]
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entry:
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br i1 undef, label %end, label %body
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body: ; preds = %entry
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tail call fastcc void @callee_no_fp() #3
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unreachable
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end: ; preds = %entry
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ret void
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}
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; When we have calls, spilling a CSR VGPR for CFI saves should force FP usage
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; Function Attrs: noinline
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define dso_local fastcc void @func_needs_fp() unnamed_addr #0 {
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; CHECK-LABEL: func_needs_fp:
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; CHECK: .Lfunc_needs_fp$local:
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; CHECK-NEXT: .type .Lfunc_needs_fp$local,@function
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: s_mov_b32 s16, s33
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; CHECK-NEXT: s_mov_b32 s33, s32
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; CHECK-NEXT: s_or_saveexec_b64 s[18:19], -1
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; CHECK-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
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; CHECK-NEXT: s_mov_b64 exec, s[18:19]
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; CHECK-NEXT: v_writelane_b32 v40, exec_lo, 2
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; CHECK-NEXT: v_writelane_b32 v40, exec_hi, 3
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; CHECK-NEXT: v_writelane_b32 v40, s16, 4
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; CHECK-NEXT: v_writelane_b32 v40, s30, 0
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; CHECK-NEXT: s_addk_i32 s32, 0x400
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; CHECK-NEXT: v_writelane_b32 v40, s31, 1
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; CHECK-NEXT: s_getpc_b64 s[16:17]
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; CHECK-NEXT: s_add_u32 s16, s16, tail_callee_fp@rel32@lo+4
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; CHECK-NEXT: s_addc_u32 s17, s17, tail_callee_fp@rel32@hi+12
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; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]
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entry:
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tail call fastcc void @tail_callee_fp() #3
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unreachable
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}
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; Function Attrs: noinline optnone
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declare dso_local fastcc void @tail_callee_fp() unnamed_addr #2
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attributes #0 = { noinline }
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attributes #1 = { "use-soft-float"="false" }
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attributes #2 = { noinline optnone }
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attributes #3 = { convergent nounwind }
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