derek.holloway
7502bf64a4
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59 lines
2.3 KiB
LLVM
59 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a < %s | FileCheck %s
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; Regression test for a bug in `DAGCombiner::replaceStoreOfInsertLoad` where
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; Idx could be smaller than PtrVT, causing a MUL to be emitted with inconsistent
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; LHS/RHS types.
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define void @testcase_0(ptr addrspace(1) %in, float %arg) {
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; CHECK-LABEL: testcase_0:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: global_store_dword v[0:1], v2, off offset:12
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; CHECK-NEXT: s_waitcnt vmcnt(0)
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%loaded = load <4 x float>, ptr addrspace(1) %in
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%modified = insertelement <4 x float> %loaded, float %arg, i64 3
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store <4 x float> %modified, ptr addrspace(1) %in
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ret void
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}
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define void @testcase_1(ptr addrspace(1) %in, float %arg) {
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; CHECK-LABEL: testcase_1:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: global_store_dword v[0:1], v2, off offset:16
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; CHECK-NEXT: s_waitcnt vmcnt(0)
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%loaded = load <6 x float>, ptr addrspace(1) %in
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%modified = insertelement <6 x float> %loaded, float %arg, i64 4
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store <6 x float> %modified, ptr addrspace(1) %in
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ret void
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}
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define void @testcase_2(ptr addrspace(1) %in, double %arg) {
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; CHECK-LABEL: testcase_2:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: global_store_dwordx2 v[0:1], v[2:3], off offset:8
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; CHECK-NEXT: s_waitcnt vmcnt(0)
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%loaded = load <4 x double>, ptr addrspace(1) %in
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%modified = insertelement <4 x double> %loaded, double %arg, i64 1
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store <4 x double> %modified, ptr addrspace(1) %in
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ret void
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}
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define void @testcase_3(ptr addrspace(1) %in, double %arg) {
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; CHECK-LABEL: testcase_3:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; CHECK-NEXT: global_store_dwordx2 v[0:1], v[2:3], off offset:56
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; CHECK-NEXT: s_waitcnt vmcnt(0)
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; CHECK-NEXT: s_setpc_b64 s[30:31]
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%loaded = load <8 x double>, ptr addrspace(1) %in
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%modified = insertelement <8 x double> %loaded, double %arg, i64 7
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store <8 x double> %modified, ptr addrspace(1) %in
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ret void
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}
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