derek.holloway
7502bf64a4
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36 lines
1.2 KiB
YAML
36 lines
1.2 KiB
YAML
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -run-pass=greedy,amdgpu-rewrite-agpr-copy-mfma -verify-machineinstrs -o - %s | FileCheck %s
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# CHECK: bb.1:
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# CHECK: dead %{{[0-9]+}}:vreg_128_align2 = V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 %{{[0-9]+}}, %{{[0-9]+}}, %{{[0-9]+}}, 4, 4, %{{[0-9]+}}, %[[REG:[0-9]+]], 4, 0, implicit $mode, implicit $exec
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# CHECK: %{{[0-9]+}}:agpr_32 = IMPLICIT_DEF
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# CHECK: %[[REG]]:vgpr_32 = COPY %{{[0-9]+}}
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# Test for issue in amdgpu-rewrite-agpr-copy-mfma, which reassigns scale operand
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# in vgpr_32 register to agpr_32, not permitted by instruction format.
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---
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name: test
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins:
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%0:vgpr_32 = IMPLICIT_DEF
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%1:av_128_align2 = IMPLICIT_DEF
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undef %2.sub0:vreg_128_align2 = IMPLICIT_DEF
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bb.1:
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liveins:
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%3:vgpr_32 = IMPLICIT_DEF
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%4:av_128_align2 = IMPLICIT_DEF
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%5:vreg_128_align2 = V_MFMA_SCALE_F32_16X16X128_F8F6F4_f4_f4_vgprcd_e64 %4, %1, %2, 4, 4, %3, %0, 4, 0, implicit $mode, implicit $exec
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%6:agpr_32 = IMPLICIT_DEF
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%0:vgpr_32 = COPY %6
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S_CBRANCH_SCC1 %bb.1, implicit undef $scc
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S_BRANCH %bb.2
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bb.2:
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liveins:
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S_ENDPGM 0
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...
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