derek.holloway
7502bf64a4
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52 lines
1.9 KiB
LLVM
52 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -amdgpu-lower-module-lds %s -o - | FileCheck %s
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; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-lower-module-lds %s -o - | FileCheck %s
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@lds = internal unnamed_addr addrspace(3) global [6144 x half] poison, align 2
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define amdgpu_kernel void @test(ptr addrspace(1) %out) {
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; CHECK-LABEL: define amdgpu_kernel void @test(
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; CHECK-SAME: ptr addrspace(1) [[OUT:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: switch i32 0, label %[[BB_3:.*]] [
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; CHECK-NEXT: i32 18, label %[[BB_2:.*]]
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; CHECK-NEXT: i32 1, label %[[BB_2]]
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; CHECK-NEXT: i32 0, label %[[BB_3]]
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; CHECK-NEXT: ]
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; CHECK: [[BB_1:.*]]:
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; CHECK-NEXT: [[TMP0:%.*]] = addrspacecast ptr addrspace(3) @llvm.amdgcn.kernel.test.lds to ptr
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; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[TMP0]] to i64
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; CHECK-NEXT: switch i32 0, label %[[BB_3]] [
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; CHECK-NEXT: i32 18, label %[[BB_2]]
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; CHECK-NEXT: i32 1, label %[[BB_2]]
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; CHECK-NEXT: i32 0, label %[[BB_3]]
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; CHECK-NEXT: ]
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; CHECK: [[BB_2]]:
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; CHECK-NEXT: [[PHI:%.*]] = phi i64 [ [[TMP1]], %[[BB_1]] ], [ [[TMP1]], %[[BB_1]] ], [ 10, %[[ENTRY]] ], [ 10, %[[ENTRY]] ]
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; CHECK-NEXT: store i64 [[PHI]], ptr addrspace(1) [[OUT]], align 8
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; CHECK-NEXT: br label %[[BB_3]]
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; CHECK: [[BB_3]]:
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; CHECK-NEXT: ret void
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;
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entry:
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switch i32 0, label %bb.3 [
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i32 18, label %bb.2
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i32 1, label %bb.2
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i32 0, label %bb.3
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]
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bb.1:
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switch i32 0, label %bb.3 [
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i32 18, label %bb.2
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i32 1, label %bb.2
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i32 0, label %bb.3
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]
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bb.2:
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%phi = phi i64 [ ptrtoint (ptr addrspacecast (ptr addrspace(3) @lds to ptr) to i64), %bb.1 ], [ ptrtoint (ptr addrspacecast (ptr addrspace(3) @lds to ptr) to i64), %bb.1 ], [10, %entry], [10, %entry]
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store i64 %phi, ptr addrspace(1) %out, align 8
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br label %bb.3
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bb.3:
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ret void
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}
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