derek.holloway
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121 lines
3.0 KiB
LLVM
121 lines
3.0 KiB
LLVM
; REQUIRES: asserts
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; RUN: llc -mtriple=amdgcn < %s -debug-only=igrouplp 2>&1 | FileCheck --check-prefixes=GCN %s
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; Inverted 3056: 101111110000
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; GCN: After Inverting, SchedGroup Mask: 3056
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define amdgpu_kernel void @invert1() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 1) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 4092: 111111111100
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; GCN: After Inverting, SchedGroup Mask: 4092
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define amdgpu_kernel void @invert2() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 2) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 4090: 111111111010
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; GCN: After Inverting, SchedGroup Mask: 4090
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define amdgpu_kernel void @invert4() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 4) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 4086: 111111110110
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; GCN: After Inverting, SchedGroup Mask: 4086
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define amdgpu_kernel void @invert8() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 8) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 1935: 011110001111
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; GCN: After Inverting, SchedGroup Mask: 1935
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define amdgpu_kernel void @invert16() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 16) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 4047: 111111001111
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; GCN: After Inverting, SchedGroup Mask: 4047
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define amdgpu_kernel void @invert32() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 32) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 4015: 111110101111
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; GCN: After Inverting, SchedGroup Mask: 4015
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define amdgpu_kernel void @invert64() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 64) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 3199: 110001111111
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; GCN: After Inverting, SchedGroup Mask: 1151
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define amdgpu_kernel void @invert128() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 128) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 3711: 111001111111
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; GCN: After Inverting, SchedGroup Mask: 3711
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define amdgpu_kernel void @invert256() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 256) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 3455: 110101111111
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; GCN: After Inverting, SchedGroup Mask: 3455
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define amdgpu_kernel void @invert512() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 512) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 3070: 101111111110
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; GCN: After Inverting, SchedGroup Mask: 3070
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define amdgpu_kernel void @invert1024() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 1024) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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; Inverted 2031: 011111101111
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; GCN: After Inverting, SchedGroup Mask: 2031
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define amdgpu_kernel void @invert2048() #0 {
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entry:
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call void @llvm.amdgcn.sched.barrier(i32 2048) #1
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call void @llvm.amdgcn.s.nop(i16 0) #1
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ret void
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}
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declare void @llvm.amdgcn.sched.barrier(i32) #1
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declare void @llvm.amdgcn.s.nop(i16) #1
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attributes #0 = { nounwind }
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attributes #1 = { convergent nounwind }
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