derek.holloway
7502bf64a4
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33 lines
1.2 KiB
YAML
33 lines
1.2 KiB
YAML
# RUN: llc -mtriple=amdgcn -mcpu=gfx908 -run-pass machine-scheduler --misched-prera-direction=topdown -verify-machineinstrs %s -o - -debug-only=machine-scheduler 2>&1 | FileCheck %s
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# REQUIRES: asserts
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# Check that cycle counts are consistent with hazards.
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# CHECK: Cycle: 3 TopQ.A
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# CHECK: hazard: SU(6) HWXDL[0]=9c, is later than CurrCycle = 3c
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# CHECK-NOT: Cycle: 9 TopQ.A
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# CHECK: Cycle: 83 TopQ.A
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# CHECK: Checking pending node SU(6)
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# CHECK: Move SU(6) into Available Q
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---
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name: pending_queue_ready_cycle
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr4_sgpr5
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%2:sgpr_128 = IMPLICIT_DEF
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%14:vgpr_32 = IMPLICIT_DEF
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%15:vgpr_32 = IMPLICIT_DEF
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%18:areg_512 = IMPLICIT_DEF
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%18:areg_512 = V_MFMA_F32_16X16X1F32_mac_e64 %15, %14, %18, 0, 0, 0, implicit $mode, implicit $exec
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%5:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET %2, 0, 0, 0, 0, implicit $exec
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%18:areg_512 = V_MFMA_F32_16X16X1F32_mac_e64 %15, %14, %18, 0, 0, 0, implicit $mode, implicit $exec
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undef %84.sub0:vreg_128_align2 = V_ADD_U32_e32 %5.sub0, %14, implicit $exec
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%7:vreg_512 = COPY %18
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SCHED_BARRIER 0
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S_NOP 0, implicit %18, implicit %7, implicit %84
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S_ENDPGM 0
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...
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