derek.holloway
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44 lines
1.9 KiB
YAML
44 lines
1.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs -run-pass=si-lower-sgpr-spills -o - %s | FileCheck %s
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---
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name: spill_partial_live_csr_sgpr_test
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tracksRegLiveness: true
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liveins:
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- { reg: '$sgpr50_sgpr51' }
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- { reg: '$sgpr52_sgpr53' }
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- { reg: '$sgpr54_sgpr55' }
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body: |
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bb.0:
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liveins: $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55
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; CHECK-LABEL: name: spill_partial_live_csr_sgpr_test
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; CHECK: liveins: $sgpr50, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $vgpr63, $sgpr50_sgpr51, $sgpr52_sgpr53, $sgpr54_sgpr55
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $vgpr63 = SI_SPILL_S32_TO_VGPR $sgpr50, 0, $vgpr63
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr50, $vgpr63, 0, 32
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; CHECK-NEXT: $vgpr63 = SI_SPILL_S32_TO_VGPR $sgpr52, 1, $vgpr63
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr52, $vgpr63, 1, 32
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; CHECK-NEXT: $vgpr63 = SI_SPILL_S32_TO_VGPR $sgpr53, 2, $vgpr63
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr53, $vgpr63, 2, 32
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; CHECK-NEXT: $vgpr63 = SI_SPILL_S32_TO_VGPR $sgpr54, 3, $vgpr63
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr54, $vgpr63, 3, 32
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; CHECK-NEXT: $vgpr63 = SI_SPILL_S32_TO_VGPR $sgpr55, 4, $vgpr63
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; CHECK-NEXT: frame-setup CFI_INSTRUCTION llvm_vector_registers $sgpr55, $vgpr63, 4, 32
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; CHECK-NEXT: S_NOP 0, implicit $sgpr50
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; CHECK-NEXT: $sgpr50 = S_MOV_B32 0
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; CHECK-NEXT: S_NOP 0, implicit $sgpr52
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; CHECK-NEXT: $sgpr52_sgpr53 = S_MOV_B64 0
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; CHECK-NEXT: S_NOP 0, implicit $sgpr55
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; CHECK-NEXT: $sgpr54_sgpr55 = S_MOV_B64 0
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; CHECK-NEXT: $sgpr56 = S_MOV_B32 0
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S_NOP 0, implicit $sgpr50
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$sgpr50 = S_MOV_B32 0
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S_NOP 0, implicit $sgpr52
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$sgpr52_sgpr53 = S_MOV_B64 0
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S_NOP 0, implicit $sgpr55
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$sgpr54_sgpr55 = S_MOV_B64 0
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$sgpr56 = S_MOV_B32 0
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...
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