derek.holloway
7502bf64a4
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60 lines
1.6 KiB
LLVM
60 lines
1.6 KiB
LLVM
;; Check that epilogues aren't tail merged.
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;; Check that this produces the expected assembly output
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; RUN: llc -mtriple=thumbv7-windows -o - %s -verify-machineinstrs | FileCheck %s
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;; Also try to write an object file, which verifies that the SEH opcodes
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;; match the actual prologue/epilogue length.
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; RUN: llc -mtriple=thumbv7-windows -filetype=obj -o %t.obj %s -verify-machineinstrs
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; CHECK-LABEL: d:
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; CHECK: .seh_proc d
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; CHECK: push.w {r11, lr}
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; CHECK-NEXT: .seh_save_regs_w {r11, lr}
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; CHECK-NEXT: .seh_endprologue
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; CHECK: .seh_startepilogue
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; CHECK-NEXT: pop.w {r11, lr}
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; CHECK-NEXT: .seh_save_regs_w {r11, lr}
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; CHECK-NEXT: b.w b
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; CHECK-NEXT: .seh_nop_w
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; CHECK-NEXT: .seh_endepilogue
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; CHECK: .seh_startepilogue
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; CHECK-NEXT: pop.w {r11, lr}
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; CHECK-NEXT: .seh_save_regs_w {r11, lr}
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; CHECK-NEXT: b.w c
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; CHECK-NEXT: .seh_nop_w
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; CHECK-NEXT: .seh_endepilogue
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; CHECK-NEXT: .seh_endproc
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@a = global i32 0, align 4
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define arm_aapcs_vfpcc void @d() optsize uwtable "frame-pointer"="none" {
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entry:
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%0 = load i32, ptr @a, align 4
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switch i32 %0, label %if.then1 [
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i32 10, label %if.then
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i32 0, label %if.end2
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]
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if.then:
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tail call arm_aapcs_vfpcc void @b()
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br label %return
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if.then1:
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tail call arm_aapcs_vfpcc void @b()
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br label %if.end2
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if.end2:
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tail call arm_aapcs_vfpcc void @c()
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br label %return
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return:
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ret void
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}
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declare arm_aapcs_vfpcc void @b(...)
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declare arm_aapcs_vfpcc void @c(...)
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