derek.holloway
7502bf64a4
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107 lines
2.7 KiB
LLVM
107 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -float-abi hard -mattr=+bf16,+fullfp16 < %s | FileCheck %s --check-prefix=HARD
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; RUN: llc -float-abi soft -mattr=+bf16,+fullfp16 < %s | FileCheck %s --check-prefix=SOFT
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "armv8.6a-arm-none-eabi"
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define bfloat @load_scalar_bf(ptr %addr) {
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; HARD-LABEL: load_scalar_bf:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: vldr.16 s0, [r0]
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; HARD-NEXT: bx lr
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;
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; SOFT-LABEL: load_scalar_bf:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: vldr.16 s0, [r0]
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; SOFT-NEXT: vmov r0, s0
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; SOFT-NEXT: bx lr
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entry:
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%0 = load bfloat, ptr %addr, align 2
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ret bfloat %0
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}
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define void @store_scalar_bf(bfloat %v, ptr %addr) {
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; HARD-LABEL: store_scalar_bf:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: vstr.16 s0, [r0]
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; HARD-NEXT: bx lr
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;
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; SOFT-LABEL: store_scalar_bf:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: vmov.f16 s0, r0
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; SOFT-NEXT: vstr.16 s0, [r1]
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; SOFT-NEXT: bx lr
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entry:
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store bfloat %v, ptr %addr, align 2
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ret void
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}
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define <4 x bfloat> @load_vector4_bf(ptr %addr) {
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; HARD-LABEL: load_vector4_bf:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: vldr d0, [r0]
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; HARD-NEXT: bx lr
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;
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; SOFT-LABEL: load_vector4_bf:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: vldr d16, [r0]
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; SOFT-NEXT: vmov r0, r1, d16
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; SOFT-NEXT: bx lr
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entry:
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%0 = load <4 x bfloat>, ptr %addr, align 8
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ret <4 x bfloat> %0
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}
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define void @store_vector4_bf(<4 x bfloat> %v, ptr %addr) {
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; HARD-LABEL: store_vector4_bf:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: vstr d0, [r0]
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; HARD-NEXT: bx lr
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;
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; SOFT-LABEL: store_vector4_bf:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: strd r0, r1, [r2]
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; SOFT-NEXT: bx lr
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entry:
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store <4 x bfloat> %v, ptr %addr, align 8
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ret void
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}
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define <8 x bfloat> @load_vector8_bf(ptr %addr) {
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; HARD-LABEL: load_vector8_bf:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: vld1.64 {d0, d1}, [r0]
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; HARD-NEXT: bx lr
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;
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; SOFT-LABEL: load_vector8_bf:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: vld1.64 {d16, d17}, [r0]
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; SOFT-NEXT: vmov r0, r1, d16
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; SOFT-NEXT: vmov r2, r3, d17
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; SOFT-NEXT: bx lr
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entry:
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%0 = load <8 x bfloat>, ptr %addr, align 8
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ret <8 x bfloat> %0
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}
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define void @store_vector8_bf(<8 x bfloat> %v, ptr %addr) {
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; HARD-LABEL: store_vector8_bf:
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; HARD: @ %bb.0: @ %entry
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; HARD-NEXT: vst1.64 {d0, d1}, [r0]
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; HARD-NEXT: bx lr
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;
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; SOFT-LABEL: store_vector8_bf:
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; SOFT: @ %bb.0: @ %entry
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; SOFT-NEXT: vmov d17, r2, r3
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; SOFT-NEXT: ldr r12, [sp]
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; SOFT-NEXT: vmov d16, r0, r1
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; SOFT-NEXT: vst1.64 {d16, d17}, [r12]
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; SOFT-NEXT: bx lr
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entry:
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store <8 x bfloat> %v, ptr %addr, align 8
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ret void
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}
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