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TheRock/compiler/amd-llvm/llvm/test/CodeGen/ARM/splitkit-remat-regclass-constraint-regression.ll
derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

40 lines
1.2 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -verify-machineinstrs -stress-regalloc=2 -o - %s | FileCheck %s
; Check that no register class constraint error is produced during
; rematerialization
target triple = "thumbv7-apple-ios"
declare ptr @_Znwm()
define void @func() {
; CHECK-LABEL: func:
; CHECK: @ %bb.0: @ %bb14
; CHECK-NEXT: str lr, [sp, #-4]!
; CHECK-NEXT: movs r0, #0
; CHECK-NEXT: movs r1, #4
; CHECK-NEXT: str r0, [r1]
; CHECK-NEXT: movs r1, #8
; CHECK-NEXT: str r0, [r1]
; CHECK-NEXT: str r0, [r0]
; CHECK-NEXT: bl __Znwm
; CHECK-NEXT: movs r1, #0
; CHECK-NEXT: movs r0, #4
; CHECK-NEXT: str r1, [r0]
; CHECK-NEXT: movs r0, #8
; CHECK-NEXT: str r1, [r0]
; CHECK-NEXT: str r1, [r1]
; CHECK-NEXT: ldr lr, [sp], #4
; CHECK-NEXT: bx lr
bb14:
call void @llvm.memset.p0.i32(ptr null, i8 0, i32 12, i1 false)
%tmp34 = call ptr @_Znwm()
call void @llvm.memset.p0.i32(ptr null, i8 0, i32 12, i1 false)
ret void
}
declare void @llvm.memset.p0.i32(ptr writeonly captures(none), i8, i32, i1 immarg) #0
attributes #0 = { nocallback nofree nounwind willreturn memory(argmem: write) }