derek.holloway
7502bf64a4
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417 lines
12 KiB
LLVM
417 lines
12 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -verify-machineinstrs -csky-no-aliases -mattr=+2e3 < %s -mtriple=csky | FileCheck %s
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; RUN: llc -verify-machineinstrs -csky-no-aliases < %s -mtriple=csky | FileCheck %s --check-prefix=GENERIC
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;; This file shows if a multiplication can be simplified to an addition/subtraction
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;; of left shifts.
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define i32 @mul_i32_4097(i32 %x) {
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; CHECK-LABEL: mul_i32_4097:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 12
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; CHECK-NEXT: addu16 a0, a1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i32_4097:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 12
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; GENERIC-NEXT: addu16 a0, a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i32 %x, 4097
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ret i32 %y
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}
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define i32 @mul_i32_4095(i32 %x) {
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; CHECK-LABEL: mul_i32_4095:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 12
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; CHECK-NEXT: subu16 a0, a1, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i32_4095:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 12
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; GENERIC-NEXT: subu16 a0, a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i32 %x, 4095
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ret i32 %y
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}
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define i32 @mul_i32_minus_4095(i32 %x) {
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; CHECK-LABEL: mul_i32_minus_4095:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 12
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; CHECK-NEXT: subu16 a0, a1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i32_minus_4095:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 12
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; GENERIC-NEXT: subu16 a0, a0, a1
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i32 %x, -4095
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ret i32 %y
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}
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define i32 @mul_i32_131074(i32 %x) {
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; CHECK-LABEL: mul_i32_131074:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 17
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; CHECK-NEXT: ixh32 a0, a1, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i32_131074:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: st16.w l0, (sp, 0) # 4-byte Folded Spill
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; GENERIC-NEXT: .cfi_offset l0, -4
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 8
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: lsli16 a2, a1, 24
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; GENERIC-NEXT: movi16 a3, 2
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; GENERIC-NEXT: lsli16 l0, a3, 16
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; GENERIC-NEXT: or16 l0, a2
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; GENERIC-NEXT: lsli16 a1, a1, 8
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; GENERIC-NEXT: or16 a1, l0
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; GENERIC-NEXT: or16 a1, a3
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; GENERIC-NEXT: mult16 a0, a1
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: ld16.w l0, (sp, 0) # 4-byte Folded Reload
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i32 %x, 131074
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ret i32 %y
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}
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define i32 @mul_i32_131076(i32 %x) {
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; CHECK-LABEL: mul_i32_131076:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 17
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; CHECK-NEXT: ixw32 a0, a1, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i32_131076:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: lsli16 a2, a1, 24
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; GENERIC-NEXT: movi16 a3, 2
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; GENERIC-NEXT: lsli16 a3, a3, 16
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; GENERIC-NEXT: or16 a3, a2
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; GENERIC-NEXT: lsli16 a1, a1, 8
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; GENERIC-NEXT: or16 a1, a3
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; GENERIC-NEXT: movi16 a2, 4
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; GENERIC-NEXT: or16 a2, a1
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; GENERIC-NEXT: mult16 a0, a2
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i32 %x, 131076
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ret i32 %y
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}
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define i32 @mul_i32_131080(i32 %x) {
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; CHECK-LABEL: mul_i32_131080:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 17
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; CHECK-NEXT: ixd32 a0, a1, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i32_131080:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: lsli16 a2, a1, 24
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; GENERIC-NEXT: movi16 a3, 2
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; GENERIC-NEXT: lsli16 a3, a3, 16
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; GENERIC-NEXT: or16 a3, a2
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; GENERIC-NEXT: lsli16 a1, a1, 8
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; GENERIC-NEXT: or16 a1, a3
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; GENERIC-NEXT: movi16 a2, 8
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; GENERIC-NEXT: or16 a2, a1
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; GENERIC-NEXT: mult16 a0, a2
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i32 %x, 131080
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ret i32 %y
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}
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define i16 @mul_i16_4097(i16 %x) {
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; CHECK-LABEL: mul_i16_4097:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 12
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; CHECK-NEXT: addu16 a0, a1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i16_4097:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 12
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; GENERIC-NEXT: addu16 a0, a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i16 %x, 4097
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ret i16 %y
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}
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define i16 @mul_i16_4095(i16 %x) {
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; CHECK-LABEL: mul_i16_4095:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 12
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; CHECK-NEXT: subu16 a0, a1, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i16_4095:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 12
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; GENERIC-NEXT: subu16 a0, a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i16 %x, 4095
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ret i16 %y
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}
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define i16 @mul_i16_minus_4095(i16 %x) {
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; CHECK-LABEL: mul_i16_minus_4095:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 12
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; CHECK-NEXT: subu16 a0, a1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i16_minus_4095:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 12
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; GENERIC-NEXT: subu16 a0, a0, a1
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i16 %x, -4095
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ret i16 %y
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}
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define i8 @mul_i8_65(i8 %x) {
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; CHECK-LABEL: mul_i8_65:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 6
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; CHECK-NEXT: addu16 a0, a1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i8_65:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 6
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; GENERIC-NEXT: addu16 a0, a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i8 %x, 65
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ret i8 %y
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}
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define i8 @mul_i8_63(i8 %x) {
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; CHECK-LABEL: mul_i8_63:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 6
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; CHECK-NEXT: subu16 a0, a1, a0
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i8_63:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 6
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; GENERIC-NEXT: subu16 a0, a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i8 %x, 63
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ret i8 %y
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}
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define i8 @mul_i8_minus_63(i8 %x) {
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; CHECK-LABEL: mul_i8_minus_63:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: lsli16 a1, a0, 6
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; CHECK-NEXT: subu16 a0, a1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i8_minus_63:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 6
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; GENERIC-NEXT: subu16 a0, a0, a1
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i8 %x, -63
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ret i8 %y
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}
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define i32 @mul_i32_minus_4097(i32 %x) {
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; CHECK-LABEL: mul_i32_minus_4097:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movih32 a1, 65535
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; CHECK-NEXT: ori32 a1, a1, 61439
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; CHECK-NEXT: mult16 a0, a1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i32_minus_4097:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 12
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; GENERIC-NEXT: addu16 a0, a1, a0
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: subu16 a0, a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i32 %x, -4097
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ret i32 %y
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}
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define i16 @mul_i16_minus_4097(i16 %x) {
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; CHECK-LABEL: mul_i16_minus_4097:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movih32 a1, 65535
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; CHECK-NEXT: ori32 a1, a1, 61439
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; CHECK-NEXT: mult16 a0, a1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i16_minus_4097:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 12
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; GENERIC-NEXT: addu16 a0, a1, a0
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: subu16 a0, a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i16 %x, -4097
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ret i16 %y
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}
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define i8 @mul_i8_minus_65(i8 %x) {
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; CHECK-LABEL: mul_i8_minus_65:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movih32 a1, 65535
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; CHECK-NEXT: ori32 a1, a1, 65471
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; CHECK-NEXT: mult16 a0, a1
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; CHECK-NEXT: rts16
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;
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; GENERIC-LABEL: mul_i8_minus_65:
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; GENERIC: # %bb.0: # %entry
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; GENERIC-NEXT: .cfi_def_cfa_offset 0
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; GENERIC-NEXT: subi16 sp, sp, 4
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; GENERIC-NEXT: .cfi_def_cfa_offset 4
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; GENERIC-NEXT: lsli16 a1, a0, 6
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; GENERIC-NEXT: addu16 a0, a1, a0
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; GENERIC-NEXT: movi16 a1, 0
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; GENERIC-NEXT: subu16 a0, a1, a0
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; GENERIC-NEXT: addi16 sp, sp, 4
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; GENERIC-NEXT: rts16
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entry:
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%y = mul nsw i8 %x, -65
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ret i8 %y
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}
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;; This case can not be optimized, due to the data type exceeds.
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define i64 @mul_i64_4097(i64 %x) {
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; CHECK-LABEL: mul_i64_4097:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subi16 sp, sp, 4
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; CHECK-NEXT: .cfi_def_cfa_offset 4
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; CHECK-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
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; CHECK-NEXT: .cfi_offset lr, -4
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; CHECK-NEXT: .cfi_def_cfa_offset 4
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; CHECK-NEXT: movi32 a2, 4097
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; CHECK-NEXT: movi16 a3, 0
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|
; CHECK-NEXT: jsri32 [.LCPI15_0]
|
|
; CHECK-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
|
|
; CHECK-NEXT: addi16 sp, sp, 4
|
|
; CHECK-NEXT: rts16
|
|
; CHECK-NEXT: .p2align 1
|
|
; CHECK-NEXT: # %bb.1:
|
|
; CHECK-NEXT: .p2align 2, 0x0
|
|
; CHECK-NEXT: .LCPI15_0:
|
|
; CHECK-NEXT: .long __muldi3
|
|
;
|
|
; GENERIC-LABEL: mul_i64_4097:
|
|
; GENERIC: # %bb.0: # %entry
|
|
; GENERIC-NEXT: subi16 sp, sp, 8
|
|
; GENERIC-NEXT: .cfi_def_cfa_offset 8
|
|
; GENERIC-NEXT: st16.w l0, (sp, 4) # 4-byte Folded Spill
|
|
; GENERIC-NEXT: st32.w lr, (sp, 0) # 4-byte Folded Spill
|
|
; GENERIC-NEXT: .cfi_offset l0, -4
|
|
; GENERIC-NEXT: .cfi_offset lr, -8
|
|
; GENERIC-NEXT: subi16 sp, sp, 4
|
|
; GENERIC-NEXT: .cfi_def_cfa_offset 12
|
|
; GENERIC-NEXT: movi16 a2, 0
|
|
; GENERIC-NEXT: lsli16 a3, a2, 24
|
|
; GENERIC-NEXT: lsli16 a2, a2, 16
|
|
; GENERIC-NEXT: or16 a2, a3
|
|
; GENERIC-NEXT: movi16 a3, 16
|
|
; GENERIC-NEXT: lsli16 a3, a3, 8
|
|
; GENERIC-NEXT: or16 a3, a2
|
|
; GENERIC-NEXT: movi16 a2, 1
|
|
; GENERIC-NEXT: or16 a2, a3
|
|
; GENERIC-NEXT: lrw32 l0, [.LCPI15_0]
|
|
; GENERIC-NEXT: movi16 a3, 0
|
|
; GENERIC-NEXT: jsr16 l0
|
|
; GENERIC-NEXT: addi16 sp, sp, 4
|
|
; GENERIC-NEXT: ld32.w lr, (sp, 0) # 4-byte Folded Reload
|
|
; GENERIC-NEXT: ld16.w l0, (sp, 4) # 4-byte Folded Reload
|
|
; GENERIC-NEXT: addi16 sp, sp, 8
|
|
; GENERIC-NEXT: rts16
|
|
; GENERIC-NEXT: .p2align 1
|
|
; GENERIC-NEXT: # %bb.1:
|
|
; GENERIC-NEXT: .p2align 2, 0x0
|
|
; GENERIC-NEXT: .LCPI15_0:
|
|
; GENERIC-NEXT: .long __muldi3
|
|
entry:
|
|
%y = mul nsw i64 %x, 4097
|
|
ret i64 %y
|
|
}
|