CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
122 lines
5.6 KiB
LLVM
122 lines
5.6 KiB
LLVM
; RUN: opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-library %s | FileCheck %s
|
|
|
|
; Make sure dxil operation function calls for firstbithigh are generated for all integer types.
|
|
|
|
define noundef i32 @test_firstbithigh_ushort(i16 noundef %a) {
|
|
entry:
|
|
; CHECK: call i32 @dx.op.unaryBits.i16(i32 33, i16 %{{.*}})
|
|
%elt.firstbithigh = call i32 @llvm.dx.firstbituhigh.i16(i16 %a)
|
|
ret i32 %elt.firstbithigh
|
|
}
|
|
|
|
define noundef i32 @test_firstbithigh_short(i16 noundef %a) {
|
|
entry:
|
|
; CHECK: call i32 @dx.op.unaryBits.i16(i32 34, i16 %{{.*}})
|
|
%elt.firstbithigh = call i32 @llvm.dx.firstbitshigh.i16(i16 %a)
|
|
ret i32 %elt.firstbithigh
|
|
}
|
|
|
|
define noundef i32 @test_firstbithigh_uint(i32 noundef %a) {
|
|
entry:
|
|
; CHECK: call i32 @dx.op.unaryBits.i32(i32 33, i32 %{{.*}})
|
|
%elt.firstbithigh = call i32 @llvm.dx.firstbituhigh.i32(i32 %a)
|
|
ret i32 %elt.firstbithigh
|
|
}
|
|
|
|
define noundef i32 @test_firstbithigh_int(i32 noundef %a) {
|
|
entry:
|
|
; CHECK: call i32 @dx.op.unaryBits.i32(i32 34, i32 %{{.*}})
|
|
%elt.firstbithigh = call i32 @llvm.dx.firstbitshigh.i32(i32 %a)
|
|
ret i32 %elt.firstbithigh
|
|
}
|
|
|
|
define noundef i32 @test_firstbithigh_ulong(i64 noundef %a) {
|
|
entry:
|
|
; CHECK: call i32 @dx.op.unaryBits.i64(i32 33, i64 %{{.*}})
|
|
%elt.firstbithigh = call i32 @llvm.dx.firstbituhigh.i64(i64 %a)
|
|
ret i32 %elt.firstbithigh
|
|
}
|
|
|
|
define noundef i32 @test_firstbithigh_long(i64 noundef %a) {
|
|
entry:
|
|
; CHECK: call i32 @dx.op.unaryBits.i64(i32 34, i64 %{{.*}})
|
|
%elt.firstbithigh = call i32 @llvm.dx.firstbitshigh.i64(i64 %a)
|
|
ret i32 %elt.firstbithigh
|
|
}
|
|
|
|
define noundef <4 x i32> @test_firstbituhigh_vec4_i32(<4 x i32> noundef %a) {
|
|
entry:
|
|
; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
|
|
; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits.i32(i32 33, i32 [[ee0]])
|
|
; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
|
|
; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits.i32(i32 33, i32 [[ee1]])
|
|
; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
|
|
; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits.i32(i32 33, i32 [[ee2]])
|
|
; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
|
|
; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits.i32(i32 33, i32 [[ee3]])
|
|
; CHECK: [[rt0:%.*]] = insertelement <4 x i32> poison, i32 [[ie0]], i64 0
|
|
; CHECK: [[rt1:%.*]] = insertelement <4 x i32> [[rt0]], i32 [[ie1]], i64 1
|
|
; CHECK: [[rt2:%.*]] = insertelement <4 x i32> [[rt1]], i32 [[ie2]], i64 2
|
|
; CHECK: [[rt3:%.*]] = insertelement <4 x i32> [[rt2]], i32 [[ie3]], i64 3
|
|
; CHECK: ret <4 x i32> [[rt3]]
|
|
%2 = call <4 x i32> @llvm.dx.firstbituhigh.v4i32(<4 x i32> %a)
|
|
ret <4 x i32> %2
|
|
}
|
|
|
|
define noundef <4 x i32> @test_firstbitshigh_vec4_i32(<4 x i32> noundef %a) {
|
|
entry:
|
|
; CHECK: [[ee0:%.*]] = extractelement <4 x i32> %a, i64 0
|
|
; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits.i32(i32 34, i32 [[ee0]])
|
|
; CHECK: [[ee1:%.*]] = extractelement <4 x i32> %a, i64 1
|
|
; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits.i32(i32 34, i32 [[ee1]])
|
|
; CHECK: [[ee2:%.*]] = extractelement <4 x i32> %a, i64 2
|
|
; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits.i32(i32 34, i32 [[ee2]])
|
|
; CHECK: [[ee3:%.*]] = extractelement <4 x i32> %a, i64 3
|
|
; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits.i32(i32 34, i32 [[ee3]])
|
|
; CHECK: [[rt0:%.*]] = insertelement <4 x i32> poison, i32 [[ie0]], i64 0
|
|
; CHECK: [[rt1:%.*]] = insertelement <4 x i32> [[rt0]], i32 [[ie1]], i64 1
|
|
; CHECK: [[rt2:%.*]] = insertelement <4 x i32> [[rt1]], i32 [[ie2]], i64 2
|
|
; CHECK: [[rt3:%.*]] = insertelement <4 x i32> [[rt2]], i32 [[ie3]], i64 3
|
|
; CHECK: ret <4 x i32> [[rt3]]
|
|
%2 = call <4 x i32> @llvm.dx.firstbitshigh.v4i32(<4 x i32> %a)
|
|
ret <4 x i32> %2
|
|
}
|
|
|
|
define noundef <4 x i32> @test_firstbituhigh_vec4_i16(<4 x i16> noundef %a) {
|
|
entry:
|
|
; CHECK: [[ee0:%.*]] = extractelement <4 x i16> %a, i64 0
|
|
; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits.i16(i32 33, i16 [[ee0]])
|
|
; CHECK: [[ee1:%.*]] = extractelement <4 x i16> %a, i64 1
|
|
; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits.i16(i32 33, i16 [[ee1]])
|
|
; CHECK: [[ee2:%.*]] = extractelement <4 x i16> %a, i64 2
|
|
; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits.i16(i32 33, i16 [[ee2]])
|
|
; CHECK: [[ee3:%.*]] = extractelement <4 x i16> %a, i64 3
|
|
; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits.i16(i32 33, i16 [[ee3]])
|
|
; CHECK: [[rt0:%.*]] = insertelement <4 x i32> poison, i32 [[ie0]], i64 0
|
|
; CHECK: [[rt1:%.*]] = insertelement <4 x i32> [[rt0]], i32 [[ie1]], i64 1
|
|
; CHECK: [[rt2:%.*]] = insertelement <4 x i32> [[rt1]], i32 [[ie2]], i64 2
|
|
; CHECK: [[rt3:%.*]] = insertelement <4 x i32> [[rt2]], i32 [[ie3]], i64 3
|
|
; CHECK: ret <4 x i32> [[rt3]]
|
|
%2 = call <4 x i32> @llvm.dx.firstbituhigh.v4i16(<4 x i16> %a)
|
|
ret <4 x i32> %2
|
|
}
|
|
|
|
define noundef <4 x i32> @test_firstbitshigh_vec4_i16(<4 x i16> noundef %a) {
|
|
entry:
|
|
; CHECK: [[ee0:%.*]] = extractelement <4 x i16> %a, i64 0
|
|
; CHECK: [[ie0:%.*]] = call i32 @dx.op.unaryBits.i16(i32 34, i16 [[ee0]])
|
|
; CHECK: [[ee1:%.*]] = extractelement <4 x i16> %a, i64 1
|
|
; CHECK: [[ie1:%.*]] = call i32 @dx.op.unaryBits.i16(i32 34, i16 [[ee1]])
|
|
; CHECK: [[ee2:%.*]] = extractelement <4 x i16> %a, i64 2
|
|
; CHECK: [[ie2:%.*]] = call i32 @dx.op.unaryBits.i16(i32 34, i16 [[ee2]])
|
|
; CHECK: [[ee3:%.*]] = extractelement <4 x i16> %a, i64 3
|
|
; CHECK: [[ie3:%.*]] = call i32 @dx.op.unaryBits.i16(i32 34, i16 [[ee3]])
|
|
; CHECK: [[rt0:%.*]] = insertelement <4 x i32> poison, i32 [[ie0]], i64 0
|
|
; CHECK: [[rt1:%.*]] = insertelement <4 x i32> [[rt0]], i32 [[ie1]], i64 1
|
|
; CHECK: [[rt2:%.*]] = insertelement <4 x i32> [[rt1]], i32 [[ie2]], i64 2
|
|
; CHECK: [[rt3:%.*]] = insertelement <4 x i32> [[rt2]], i32 [[ie3]], i64 3
|
|
; CHECK: ret <4 x i32> [[rt3]]
|
|
%2 = call <4 x i32> @llvm.dx.firstbitshigh.v4i16(<4 x i16> %a)
|
|
ret <4 x i32> %2
|
|
}
|