derek.holloway
7502bf64a4
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33 lines
2.6 KiB
LLVM
33 lines
2.6 KiB
LLVM
; RUN: llc -mtriple=hexagon < %s | FileCheck %s
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; Check that this compiles successfully.
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; CHECK: vmem
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target datalayout = "e-m:e-p:32:32:32-a:0-n16:32-i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-v32:32:32-v64:64:64-v512:512:512-v1024:1024:1024-v2048:2048:2048"
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target triple = "hexagon"
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define void @f0() #0 {
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b0:
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%v0 = call <64 x i32> @llvm.masked.load.v64i32.p0(ptr nonnull undef, i32 4, <64 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>, <64 x i32> undef)
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%v1 = icmp sgt <64 x i32> %v0, zeroinitializer
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%v2 = sext <64 x i1> %v1 to <64 x i32>
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%v3 = add nsw <64 x i32> zeroinitializer, %v2
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%v4 = add nsw <64 x i32> %v3, zeroinitializer
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%v5 = icmp sgt <64 x i32> %v4, zeroinitializer
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%v6 = select <64 x i1> %v5, <64 x i32> %v4, <64 x i32> zeroinitializer
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%v7 = select <64 x i1> zeroinitializer, <64 x i32> undef, <64 x i32> %v6
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%v8 = trunc <64 x i32> %v7 to <64 x i16>
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call void @llvm.masked.store.v64i16.p0(<64 x i16> %v8, ptr undef, i32 2, <64 x i1> <i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 true, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false, i1 false>)
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ret void
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}
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; Function Attrs: argmemonly nounwind readonly willreturn
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declare <64 x i32> @llvm.masked.load.v64i32.p0(ptr, i32 immarg, <64 x i1>, <64 x i32>) #1
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; Function Attrs: argmemonly nounwind willreturn
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declare void @llvm.masked.store.v64i16.p0(<64 x i16>, ptr, i32 immarg, <64 x i1>) #2
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attributes #0 = { "target-features"="+hvx-length128b,+hvxv67,+v67,-long-calls" }
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attributes #1 = { argmemonly nounwind readonly willreturn }
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attributes #2 = { argmemonly nounwind willreturn }
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