derek.holloway
7502bf64a4
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46 lines
1.9 KiB
LLVM
46 lines
1.9 KiB
LLVM
; RUN: llc -mtriple=hexagon < %s | FileCheck %s
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; Check if only one transfer immediate instruction is generated for init.end block.
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; Since the transfer immediate of address operand is declared as not cheap, it
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; should generate only one transfer immediate, rather than two of them.
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; CHECK-LABEL: .LBB{{.*}}
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; CHECK: r0 = ##_ZZ3foovE1x
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; CHECK-NOT: r{{[1-9]*}} = ##_ZZ3foovE1x
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; CHECK: memw(r0+#0) += #1
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; CHECK: r{{.*}} = dealloc_return
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%struct.FooBaz = type { i32 }
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@_ZZ3foovE1x = internal global %struct.FooBaz zeroinitializer, align 4
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@_ZGVZ3foovE1x = internal global i64 0, section ".bss._ZGVZ3foovE1x", align 8
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@__dso_handle = external dso_local global i8
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define dso_local ptr @_Z3foov() local_unnamed_addr optsize {
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entry:
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%0 = load atomic i8, ptr @_ZGVZ3foovE1x acquire, align 8
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%guard.uninitialized = icmp eq i8 %0, 0
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br i1 %guard.uninitialized, label %init.check, label %init.end
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init.check: ; preds = %entry
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%1 = tail call i32 @__cxa_guard_acquire(ptr nonnull @_ZGVZ3foovE1x)
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%tobool = icmp eq i32 %1, 0
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br i1 %tobool, label %init.end, label %init
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init: ; preds = %init.check
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tail call void @_ZN6FooBazC1Ev(ptr nonnull @_ZZ3foovE1x)
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%2 = tail call i32 @__cxa_atexit(ptr @_ZN6FooBazD1Ev, ptr @_ZZ3foovE1x, ptr nonnull @__dso_handle)
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tail call void @__cxa_guard_release(ptr nonnull @_ZGVZ3foovE1x)
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br label %init.end
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init.end: ; preds = %init, %init.check, %entry
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%3 = load i32, ptr @_ZZ3foovE1x, align 4
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%inc = add nsw i32 %3, 1
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store i32 %inc, ptr @_ZZ3foovE1x, align 4
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ret ptr @_ZZ3foovE1x
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}
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declare dso_local i32 @__cxa_guard_acquire(ptr) local_unnamed_addr
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declare dso_local void @_ZN6FooBazC1Ev(ptr) unnamed_addr
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declare dso_local void @_ZN6FooBazD1Ev(ptr) unnamed_addr
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declare dso_local i32 @__cxa_atexit(ptr, ptr, ptr) local_unnamed_addr
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declare dso_local void @__cxa_guard_release(ptr) local_unnamed_addr
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