derek.holloway
7502bf64a4
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26 lines
683 B
LLVM
26 lines
683 B
LLVM
; RUN: llc -mtriple=hexagon < %s
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; REQUIRES: asserts
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; Check that the verifier doesn't fail due to incorrect
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; ordering of registers caused by PHI elimination.
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; Function Attrs: readnone
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define i32 @f0(i32 %a0, i32 %a1, i32 %a2) #0 {
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b0:
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br label %b1
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b1: ; preds = %b1, %b0
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%v0 = phi i32 [ %a1, %b0 ], [ %v2, %b1 ]
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%v1 = phi i32 [ 0, %b0 ], [ %v4, %b1 ]
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%v2 = phi i32 [ %a0, %b0 ], [ %v0, %b1 ]
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%v3 = icmp slt i32 %v1, %a2
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%v4 = add nsw i32 %v1, 1
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br i1 %v3, label %b1, label %b2
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b2: ; preds = %b1
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%v5 = add nsw i32 %v2, %v0
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ret i32 %v5
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}
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attributes #0 = { readnone }
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