derek.holloway
7502bf64a4
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33 lines
1.5 KiB
LLVM
33 lines
1.5 KiB
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
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; REQUIRES: hexagon
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; This test was asserting because getVRegDef() was called on a register with
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; multiple defs.
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; Checks that the test does not assert and vsub is generated.
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; CHECK: vsub
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target triple = "hexagon"
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@v = common dso_local local_unnamed_addr global <32 x i32> zeroinitializer, align 128
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; Function Attrs: nounwind
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define dso_local void @hvx_twoSum(<32 x i32>* nocapture noundef writeonly %s2lo) local_unnamed_addr #0 {
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entry:
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%0 = load <32 x i32>, <32 x i32>* @v, align 128
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%call = tail call inreg <32 x i32> @MY_Vsf_equals_Vqf32(<32 x i32> noundef %0) #3
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%1 = tail call <32 x i32> @llvm.hexagon.V6.vsub.sf.128B(<32 x i32> %call, <32 x i32> %call)
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store <32 x i32> %1, <32 x i32>* @v, align 128
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store <32 x i32> %1, <32 x i32>* %s2lo, align 128
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ret void
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}
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declare dso_local inreg <32 x i32> @MY_Vsf_equals_Vqf32(<32 x i32> noundef) local_unnamed_addr #1
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; Function Attrs: nofree nosync nounwind readnone
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declare <32 x i32> @llvm.hexagon.V6.vsub.sf.128B(<32 x i32>, <32 x i32>) #2
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attributes #0 = { nounwind "frame-pointer"="all" "min-legal-vector-width"="1024" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv73" "target-features"="+hvx-length128b,+hvxv73,+v73,-long-calls" }
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attributes #1 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="hexagonv73" "target-features"="+hvx-length128b,+hvxv73,+v73,-long-calls" }
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attributes #2 = { nofree nosync nounwind readnone }
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attributes #3 = { nounwind }
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