derek.holloway
7502bf64a4
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24 lines
781 B
LLVM
24 lines
781 B
LLVM
; RUN: llc -mtriple=hexagon -O3 < %s | FileCheck %s
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; Test that unaligned load is enabled for 128B
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; CHECK-NOT: r{{[0-9]+}} = memw
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; Function Attrs: nounwind
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define void @f0(ptr noalias nocapture readonly %a0, ptr nocapture %a1) #0 {
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b0:
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%v1 = load <32 x i32>, ptr %a0, align 4, !tbaa !0
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%v2 = tail call <32 x i32> @llvm.hexagon.V6.vrmpyub.128B(<32 x i32> %v1, i32 16843009)
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store <32 x i32> %v2, ptr %a1, align 128, !tbaa !0
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ret void
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}
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; Function Attrs: nounwind readnone
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declare <32 x i32> @llvm.hexagon.V6.vrmpyub.128B(<32 x i32>, i32) #1
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attributes #0 = { nounwind "target-cpu"="hexagonv60" "target-features"="+hvxv60,+hvx-length128b" }
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attributes #1 = { nounwind readnone }
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!0 = !{!1, !1, i64 0}
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!1 = !{!"omnipotent char", !2, i64 0}
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!2 = !{!"Simple C/C++ TBAA"}
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