derek.holloway
7502bf64a4
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519 lines
14 KiB
LLVM
519 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 -mattr=-32s,+d < %s | FileCheck %s --check-prefix=LA32R
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; RUN: llc --mtriple=loongarch32 -mattr=+32s,+d < %s | FileCheck %s --check-prefix=LA32S
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; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s --check-prefix=LA64
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define i8 @alsl_i8(i8 signext %a, i8 signext %b) nounwind {
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; LA32R-LABEL: alsl_i8:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a0, $a0, 1
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: alsl_i8:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: alsl.w $a0, $a0, $a1, 1
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: alsl_i8:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: alsl.d $a0, $a0, $a1, 1
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i8 %a, 2
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%add = add nsw i8 %b, %mul
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ret i8 %add
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}
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define i16 @alsl_i16(i16 signext %a, i16 signext %b) nounwind {
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; LA32R-LABEL: alsl_i16:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a0, $a0, 2
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: alsl_i16:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: alsl.w $a0, $a0, $a1, 2
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: alsl_i16:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: alsl.d $a0, $a0, $a1, 2
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i16 %a, 4
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%add = add nsw i16 %b, %mul
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ret i16 %add
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}
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define i32 @alsl_i32(i32 signext %a, i32 signext %b) nounwind {
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; LA32R-LABEL: alsl_i32:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a0, $a0, 3
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: alsl_i32:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: alsl.w $a0, $a0, $a1, 3
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: alsl_i32:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: alsl.w $a0, $a0, $a1, 3
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i32 %a, 8
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%add = add nsw i32 %b, %mul
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ret i32 %add
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}
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define i64 @alsl_i64(i64 signext %a, i64 signext %b) nounwind {
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; LA32R-LABEL: alsl_i64:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: srli.w $a4, $a0, 28
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; LA32R-NEXT: slli.w $a1, $a1, 4
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; LA32R-NEXT: or $a1, $a1, $a4
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; LA32R-NEXT: slli.w $a0, $a0, 4
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; LA32R-NEXT: add.w $a0, $a2, $a0
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; LA32R-NEXT: sltu $a2, $a0, $a2
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; LA32R-NEXT: add.w $a1, $a3, $a1
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; LA32R-NEXT: add.w $a1, $a1, $a2
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: alsl_i64:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: srli.w $a4, $a0, 28
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; LA32S-NEXT: slli.w $a1, $a1, 4
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; LA32S-NEXT: or $a1, $a1, $a4
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; LA32S-NEXT: alsl.w $a0, $a0, $a2, 4
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; LA32S-NEXT: sltu $a2, $a0, $a2
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; LA32S-NEXT: add.w $a1, $a3, $a1
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; LA32S-NEXT: add.w $a1, $a1, $a2
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: alsl_i64:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: alsl.d $a0, $a0, $a1, 4
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i64 %a, 16
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%add = add nsw i64 %b, %mul
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ret i64 %add
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}
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define i32 @alsl_zext_i8(i8 signext %a, i8 signext %b) nounwind {
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; LA32R-LABEL: alsl_zext_i8:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a0, $a0, 1
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: andi $a0, $a0, 255
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: alsl_zext_i8:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: alsl.w $a0, $a0, $a1, 1
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; LA32S-NEXT: andi $a0, $a0, 255
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: alsl_zext_i8:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: alsl.d $a0, $a0, $a1, 1
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; LA64-NEXT: andi $a0, $a0, 255
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i8 %a, 2
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%add = add nsw i8 %b, %mul
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%zext = zext i8 %add to i32
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ret i32 %zext
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}
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define i32 @alsl_zext_i16(i16 signext %a, i16 signext %b) nounwind {
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; LA32R-LABEL: alsl_zext_i16:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a0, $a0, 2
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: lu12i.w $a1, 15
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; LA32R-NEXT: ori $a1, $a1, 4095
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; LA32R-NEXT: and $a0, $a0, $a1
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: alsl_zext_i16:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: alsl.w $a0, $a0, $a1, 2
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; LA32S-NEXT: bstrpick.w $a0, $a0, 15, 0
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: alsl_zext_i16:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: alsl.d $a0, $a0, $a1, 2
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; LA64-NEXT: bstrpick.d $a0, $a0, 15, 0
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i16 %a, 4
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%add = add nsw i16 %b, %mul
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%zext = zext i16 %add to i32
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ret i32 %zext
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}
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define i64 @alsl_zext_i32(i32 signext %a, i32 signext %b) nounwind {
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; LA32R-LABEL: alsl_zext_i32:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a0, $a0, 3
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: move $a1, $zero
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: alsl_zext_i32:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: alsl.w $a0, $a0, $a1, 3
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; LA32S-NEXT: move $a1, $zero
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: alsl_zext_i32:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: alsl.wu $a0, $a0, $a1, 3
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i32 %a, 8
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%add = add nsw i32 %b, %mul
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%zext = zext i32 %add to i64
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ret i64 %zext
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}
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define i8 @mul_add_i8(i8 signext %a, i8 signext %b) nounwind {
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; LA32R-LABEL: mul_add_i8:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a2, $a0, 1
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; LA32R-NEXT: add.w $a0, $a2, $a0
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: mul_add_i8:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: alsl.w $a0, $a0, $a0, 1
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; LA32S-NEXT: add.w $a0, $a1, $a0
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: mul_add_i8:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: alsl.d $a0, $a0, $a0, 1
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; LA64-NEXT: add.d $a0, $a1, $a0
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i8 %a, 3
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%add = add nsw i8 %b, %mul
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ret i8 %add
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}
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define i16 @mul_add_i16(i16 signext %a, i16 signext %b) nounwind {
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; LA32R-LABEL: mul_add_i16:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a2, $a0, 1
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; LA32R-NEXT: slli.w $a0, $a0, 3
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; LA32R-NEXT: add.w $a0, $a0, $a2
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: mul_add_i16:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: slli.w $a2, $a0, 3
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; LA32S-NEXT: alsl.w $a0, $a0, $a2, 1
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; LA32S-NEXT: add.w $a0, $a1, $a0
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: mul_add_i16:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: slli.d $a2, $a0, 3
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; LA64-NEXT: alsl.d $a0, $a0, $a2, 1
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; LA64-NEXT: add.d $a0, $a1, $a0
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i16 %a, 10
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%add = add nsw i16 %b, %mul
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ret i16 %add
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}
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define i32 @mul_add_i32(i32 signext %a, i32 signext %b) nounwind {
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; LA32R-LABEL: mul_add_i32:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a2, $a0, 2
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; LA32R-NEXT: slli.w $a0, $a0, 3
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; LA32R-NEXT: add.w $a0, $a0, $a2
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: mul_add_i32:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: slli.w $a2, $a0, 3
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; LA32S-NEXT: alsl.w $a0, $a0, $a2, 2
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; LA32S-NEXT: add.w $a0, $a1, $a0
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: mul_add_i32:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: slli.d $a2, $a0, 3
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; LA64-NEXT: alsl.d $a0, $a0, $a2, 2
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; LA64-NEXT: add.w $a0, $a1, $a0
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i32 %a, 12
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%add = add nsw i32 %b, %mul
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ret i32 %add
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}
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define i64 @mul_add_i64(i64 signext %a, i64 signext %b) nounwind {
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; LA32R-LABEL: mul_add_i64:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: ori $a4, $zero, 15
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; LA32R-NEXT: mulh.wu $a4, $a0, $a4
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; LA32R-NEXT: slli.w $a5, $a1, 4
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; LA32R-NEXT: sub.w $a1, $a5, $a1
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; LA32R-NEXT: add.w $a1, $a4, $a1
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; LA32R-NEXT: slli.w $a4, $a0, 4
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; LA32R-NEXT: sub.w $a0, $a4, $a0
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; LA32R-NEXT: add.w $a1, $a3, $a1
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; LA32R-NEXT: add.w $a0, $a2, $a0
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; LA32R-NEXT: sltu $a2, $a0, $a2
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; LA32R-NEXT: add.w $a1, $a1, $a2
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: mul_add_i64:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: ori $a4, $zero, 15
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; LA32S-NEXT: mulh.wu $a4, $a0, $a4
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; LA32S-NEXT: slli.w $a5, $a1, 4
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; LA32S-NEXT: sub.w $a1, $a5, $a1
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; LA32S-NEXT: add.w $a1, $a4, $a1
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; LA32S-NEXT: slli.w $a4, $a0, 4
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; LA32S-NEXT: sub.w $a0, $a4, $a0
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; LA32S-NEXT: add.w $a1, $a3, $a1
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; LA32S-NEXT: add.w $a0, $a2, $a0
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; LA32S-NEXT: sltu $a2, $a0, $a2
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; LA32S-NEXT: add.w $a1, $a1, $a2
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: mul_add_i64:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: slli.d $a2, $a0, 4
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; LA64-NEXT: sub.d $a0, $a2, $a0
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; LA64-NEXT: add.d $a0, $a1, $a0
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i64 %a, 15
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%add = add nsw i64 %b, %mul
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ret i64 %add
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}
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define i32 @mul_add_zext_i8(i8 signext %a, i8 signext %b) nounwind {
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; LA32R-LABEL: mul_add_zext_i8:
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; LA32R: # %bb.0: # %entry
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; LA32R-NEXT: slli.w $a2, $a0, 2
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; LA32R-NEXT: add.w $a0, $a2, $a0
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; LA32R-NEXT: add.w $a0, $a1, $a0
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; LA32R-NEXT: andi $a0, $a0, 255
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; LA32R-NEXT: ret
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;
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; LA32S-LABEL: mul_add_zext_i8:
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; LA32S: # %bb.0: # %entry
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; LA32S-NEXT: alsl.w $a0, $a0, $a0, 2
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; LA32S-NEXT: add.w $a0, $a1, $a0
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; LA32S-NEXT: andi $a0, $a0, 255
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; LA32S-NEXT: ret
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;
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; LA64-LABEL: mul_add_zext_i8:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: alsl.d $a0, $a0, $a0, 2
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; LA64-NEXT: add.d $a0, $a1, $a0
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; LA64-NEXT: andi $a0, $a0, 255
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; LA64-NEXT: ret
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entry:
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%mul = mul nsw i8 %a, 5
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%add = add nsw i8 %b, %mul
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%zext = zext i8 %add to i32
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ret i32 %zext
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}
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define i32 @mul_add_zext_i16(i16 signext %a, i16 signext %b) nounwind {
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; LA32R-LABEL: mul_add_zext_i16:
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; LA32R: # %bb.0: # %entry
|
|
; LA32R-NEXT: slli.w $a2, $a0, 4
|
|
; LA32R-NEXT: sub.w $a0, $a2, $a0
|
|
; LA32R-NEXT: add.w $a0, $a1, $a0
|
|
; LA32R-NEXT: lu12i.w $a1, 15
|
|
; LA32R-NEXT: ori $a1, $a1, 4095
|
|
; LA32R-NEXT: and $a0, $a0, $a1
|
|
; LA32R-NEXT: ret
|
|
;
|
|
; LA32S-LABEL: mul_add_zext_i16:
|
|
; LA32S: # %bb.0: # %entry
|
|
; LA32S-NEXT: slli.w $a2, $a0, 4
|
|
; LA32S-NEXT: sub.w $a0, $a2, $a0
|
|
; LA32S-NEXT: add.w $a0, $a1, $a0
|
|
; LA32S-NEXT: bstrpick.w $a0, $a0, 15, 0
|
|
; LA32S-NEXT: ret
|
|
;
|
|
; LA64-LABEL: mul_add_zext_i16:
|
|
; LA64: # %bb.0: # %entry
|
|
; LA64-NEXT: slli.d $a2, $a0, 4
|
|
; LA64-NEXT: sub.d $a0, $a2, $a0
|
|
; LA64-NEXT: add.d $a0, $a1, $a0
|
|
; LA64-NEXT: bstrpick.d $a0, $a0, 15, 0
|
|
; LA64-NEXT: ret
|
|
entry:
|
|
%mul = mul nsw i16 %a, 15
|
|
%add = add nsw i16 %b, %mul
|
|
%zext = zext i16 %add to i32
|
|
ret i32 %zext
|
|
}
|
|
|
|
define i64 @mul_add_zext_i32(i32 signext %a, i32 signext %b) nounwind {
|
|
; LA32R-LABEL: mul_add_zext_i32:
|
|
; LA32R: # %bb.0: # %entry
|
|
; LA32R-NEXT: slli.w $a2, $a0, 2
|
|
; LA32R-NEXT: add.w $a0, $a2, $a0
|
|
; LA32R-NEXT: add.w $a0, $a1, $a0
|
|
; LA32R-NEXT: move $a1, $zero
|
|
; LA32R-NEXT: ret
|
|
;
|
|
; LA32S-LABEL: mul_add_zext_i32:
|
|
; LA32S: # %bb.0: # %entry
|
|
; LA32S-NEXT: alsl.w $a0, $a0, $a0, 2
|
|
; LA32S-NEXT: add.w $a0, $a1, $a0
|
|
; LA32S-NEXT: move $a1, $zero
|
|
; LA32S-NEXT: ret
|
|
;
|
|
; LA64-LABEL: mul_add_zext_i32:
|
|
; LA64: # %bb.0: # %entry
|
|
; LA64-NEXT: alsl.d $a0, $a0, $a0, 2
|
|
; LA64-NEXT: add.d $a0, $a1, $a0
|
|
; LA64-NEXT: bstrpick.d $a0, $a0, 31, 0
|
|
; LA64-NEXT: ret
|
|
entry:
|
|
%mul = mul nsw i32 %a, 5
|
|
%add = add nsw i32 %b, %mul
|
|
%zext = zext i32 %add to i64
|
|
ret i64 %zext
|
|
}
|
|
|
|
define i8 @alsl_neg_i8(i8 signext %a, i8 signext %b) nounwind {
|
|
; LA32R-LABEL: alsl_neg_i8:
|
|
; LA32R: # %bb.0: # %entry
|
|
; LA32R-NEXT: slli.w $a2, $a0, 1
|
|
; LA32R-NEXT: add.w $a0, $a2, $a0
|
|
; LA32R-NEXT: sub.w $a0, $a1, $a0
|
|
; LA32R-NEXT: ret
|
|
;
|
|
; LA32S-LABEL: alsl_neg_i8:
|
|
; LA32S: # %bb.0: # %entry
|
|
; LA32S-NEXT: alsl.w $a0, $a0, $a0, 1
|
|
; LA32S-NEXT: sub.w $a0, $a1, $a0
|
|
; LA32S-NEXT: ret
|
|
;
|
|
; LA64-LABEL: alsl_neg_i8:
|
|
; LA64: # %bb.0: # %entry
|
|
; LA64-NEXT: alsl.d $a0, $a0, $a0, 1
|
|
; LA64-NEXT: sub.d $a0, $a1, $a0
|
|
; LA64-NEXT: ret
|
|
entry:
|
|
%mul = mul nsw i8 %a, -3
|
|
%add = add nsw i8 %b, %mul
|
|
ret i8 %add
|
|
}
|
|
|
|
define i16 @alsl_neg_i16(i16 signext %a, i16 signext %b) nounwind {
|
|
; LA32R-LABEL: alsl_neg_i16:
|
|
; LA32R: # %bb.0: # %entry
|
|
; LA32R-NEXT: slli.w $a2, $a0, 2
|
|
; LA32R-NEXT: add.w $a0, $a2, $a0
|
|
; LA32R-NEXT: sub.w $a0, $a1, $a0
|
|
; LA32R-NEXT: ret
|
|
;
|
|
; LA32S-LABEL: alsl_neg_i16:
|
|
; LA32S: # %bb.0: # %entry
|
|
; LA32S-NEXT: alsl.w $a0, $a0, $a0, 2
|
|
; LA32S-NEXT: sub.w $a0, $a1, $a0
|
|
; LA32S-NEXT: ret
|
|
;
|
|
; LA64-LABEL: alsl_neg_i16:
|
|
; LA64: # %bb.0: # %entry
|
|
; LA64-NEXT: alsl.d $a0, $a0, $a0, 2
|
|
; LA64-NEXT: sub.d $a0, $a1, $a0
|
|
; LA64-NEXT: ret
|
|
entry:
|
|
%mul = mul nsw i16 %a, -5
|
|
%add = add nsw i16 %b, %mul
|
|
ret i16 %add
|
|
}
|
|
|
|
define i32 @alsl_neg_i32(i32 signext %a, i32 signext %b) nounwind {
|
|
; LA32R-LABEL: alsl_neg_i32:
|
|
; LA32R: # %bb.0: # %entry
|
|
; LA32R-NEXT: slli.w $a2, $a0, 3
|
|
; LA32R-NEXT: add.w $a0, $a2, $a0
|
|
; LA32R-NEXT: sub.w $a0, $a1, $a0
|
|
; LA32R-NEXT: ret
|
|
;
|
|
; LA32S-LABEL: alsl_neg_i32:
|
|
; LA32S: # %bb.0: # %entry
|
|
; LA32S-NEXT: alsl.w $a0, $a0, $a0, 3
|
|
; LA32S-NEXT: sub.w $a0, $a1, $a0
|
|
; LA32S-NEXT: ret
|
|
;
|
|
; LA64-LABEL: alsl_neg_i32:
|
|
; LA64: # %bb.0: # %entry
|
|
; LA64-NEXT: alsl.d $a0, $a0, $a0, 3
|
|
; LA64-NEXT: sub.w $a0, $a1, $a0
|
|
; LA64-NEXT: ret
|
|
entry:
|
|
%mul = mul nsw i32 %a, -9
|
|
%add = add nsw i32 %b, %mul
|
|
ret i32 %add
|
|
}
|
|
|
|
define i64 @mul_add_neg_i64(i64 signext %a, i64 signext %b) nounwind {
|
|
; LA32R-LABEL: mul_add_neg_i64:
|
|
; LA32R: # %bb.0: # %entry
|
|
; LA32R-NEXT: slli.w $a4, $a1, 4
|
|
; LA32R-NEXT: sub.w $a1, $a1, $a4
|
|
; LA32R-NEXT: addi.w $a4, $zero, -15
|
|
; LA32R-NEXT: mulh.wu $a4, $a0, $a4
|
|
; LA32R-NEXT: sub.w $a4, $a4, $a0
|
|
; LA32R-NEXT: add.w $a1, $a4, $a1
|
|
; LA32R-NEXT: slli.w $a4, $a0, 4
|
|
; LA32R-NEXT: sub.w $a0, $a0, $a4
|
|
; LA32R-NEXT: add.w $a1, $a3, $a1
|
|
; LA32R-NEXT: add.w $a0, $a2, $a0
|
|
; LA32R-NEXT: sltu $a2, $a0, $a2
|
|
; LA32R-NEXT: add.w $a1, $a1, $a2
|
|
; LA32R-NEXT: ret
|
|
;
|
|
; LA32S-LABEL: mul_add_neg_i64:
|
|
; LA32S: # %bb.0: # %entry
|
|
; LA32S-NEXT: slli.w $a4, $a1, 4
|
|
; LA32S-NEXT: sub.w $a1, $a1, $a4
|
|
; LA32S-NEXT: addi.w $a4, $zero, -15
|
|
; LA32S-NEXT: mulh.wu $a4, $a0, $a4
|
|
; LA32S-NEXT: sub.w $a4, $a4, $a0
|
|
; LA32S-NEXT: add.w $a1, $a4, $a1
|
|
; LA32S-NEXT: slli.w $a4, $a0, 4
|
|
; LA32S-NEXT: sub.w $a0, $a0, $a4
|
|
; LA32S-NEXT: add.w $a1, $a3, $a1
|
|
; LA32S-NEXT: add.w $a0, $a2, $a0
|
|
; LA32S-NEXT: sltu $a2, $a0, $a2
|
|
; LA32S-NEXT: add.w $a1, $a1, $a2
|
|
; LA32S-NEXT: ret
|
|
;
|
|
; LA64-LABEL: mul_add_neg_i64:
|
|
; LA64: # %bb.0: # %entry
|
|
; LA64-NEXT: slli.d $a2, $a0, 4
|
|
; LA64-NEXT: sub.d $a0, $a0, $a2
|
|
; LA64-NEXT: add.d $a0, $a1, $a0
|
|
; LA64-NEXT: ret
|
|
entry:
|
|
%mul = mul nsw i64 %a, -15
|
|
%add = add nsw i64 %b, %mul
|
|
ret i64 %add
|
|
}
|