derek.holloway
7502bf64a4
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205 lines
7.6 KiB
LLVM
205 lines
7.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --mattr=+d --target-abi=ilp32d < %s \
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; RUN: | FileCheck %s
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;; This file contains specific tests for the ilp32d ABI.
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;; Check pass floating-point arguments whith FPRs.
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define i32 @callee_float_in_fpr(i32 %a, float %b, double %c) nounwind {
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; CHECK-LABEL: callee_float_in_fpr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: ftintrz.w.s $fa0, $fa0
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; CHECK-NEXT: movfr2gr.s $a1, $fa0
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; CHECK-NEXT: ftintrz.w.d $fa0, $fa1
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; CHECK-NEXT: movfr2gr.s $a2, $fa0
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; CHECK-NEXT: add.w $a0, $a0, $a1
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; CHECK-NEXT: add.w $a0, $a0, $a2
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; CHECK-NEXT: ret
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%b_fptosi = fptosi float %b to i32
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%c_fptosi = fptosi double %c to i32
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%1 = add i32 %a, %b_fptosi
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%2 = add i32 %1, %c_fptosi
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ret i32 %2
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}
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define i32 @caller_float_in_fpr() nounwind {
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; CHECK-LABEL: caller_float_in_fpr:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.w $sp, $sp, -16
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; CHECK-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
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; CHECK-NEXT: movgr2fr.w $fa1, $zero
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; CHECK-NEXT: movgr2frh.w $fa1, $zero
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; CHECK-NEXT: movgr2fr.w $fa0, $zero
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; CHECK-NEXT: ori $a0, $zero, 1
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; CHECK-NEXT: bl callee_float_in_fpr
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; CHECK-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
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; CHECK-NEXT: addi.w $sp, $sp, 16
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; CHECK-NEXT: ret
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%1 = call i32 @callee_float_in_fpr(i32 1, float 0.0, double 0.0)
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ret i32 %1
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}
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;; Check that the GPR is used once the FPRs are exhausted.
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;; Must keep define on a single line due to an update_llc_test_checks.py limitation.
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define i32 @callee_double_in_gpr_exhausted_fprs(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i) nounwind {
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; CHECK-LABEL: callee_double_in_gpr_exhausted_fprs:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movgr2fr.w $fa0, $a0
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; CHECK-NEXT: movgr2frh.w $fa0, $a1
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; CHECK-NEXT: ftintrz.w.d $fa1, $fa7
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; CHECK-NEXT: movfr2gr.s $a0, $fa1
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; CHECK-NEXT: ftintrz.w.d $fa0, $fa0
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; CHECK-NEXT: movfr2gr.s $a1, $fa0
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; CHECK-NEXT: add.w $a0, $a0, $a1
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; CHECK-NEXT: ret
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%h_fptosi = fptosi double %h to i32
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%i_fptosi = fptosi double %i to i32
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%1 = add i32 %h_fptosi, %i_fptosi
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ret i32 %1
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}
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define i32 @caller_double_in_gpr_exhausted_fprs() nounwind {
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; CHECK-LABEL: caller_double_in_gpr_exhausted_fprs:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.w $sp, $sp, -16
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; CHECK-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
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; CHECK-NEXT: movgr2fr.w $fa7, $zero
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; CHECK-NEXT: lu12i.w $a0, 261888
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; CHECK-NEXT: fmov.d $fa0, $fa7
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; CHECK-NEXT: movgr2frh.w $fa0, $a0
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; CHECK-NEXT: lu12i.w $a0, 262144
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; CHECK-NEXT: fmov.d $fa1, $fa7
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; CHECK-NEXT: movgr2frh.w $fa1, $a0
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; CHECK-NEXT: lu12i.w $a0, 262400
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; CHECK-NEXT: fmov.d $fa3, $fa7
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; CHECK-NEXT: movgr2frh.w $fa3, $a0
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; CHECK-NEXT: .Lpcadd_hi0:
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; CHECK-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI3_0)
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; CHECK-NEXT: fld.d $fa2, $a0, %pcadd_lo12(.Lpcadd_hi0)
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; CHECK-NEXT: .Lpcadd_hi1:
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; CHECK-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI3_1)
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; CHECK-NEXT: fld.d $fa4, $a0, %pcadd_lo12(.Lpcadd_hi1)
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; CHECK-NEXT: .Lpcadd_hi2:
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; CHECK-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI3_2)
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; CHECK-NEXT: fld.d $fa5, $a0, %pcadd_lo12(.Lpcadd_hi2)
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; CHECK-NEXT: .Lpcadd_hi3:
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; CHECK-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI3_3)
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; CHECK-NEXT: fld.d $fa6, $a0, %pcadd_lo12(.Lpcadd_hi3)
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; CHECK-NEXT: lu12i.w $a0, 262656
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; CHECK-NEXT: movgr2frh.w $fa7, $a0
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; CHECK-NEXT: lu12i.w $a1, 262688
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; CHECK-NEXT: move $a0, $zero
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; CHECK-NEXT: bl callee_double_in_gpr_exhausted_fprs
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; CHECK-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
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; CHECK-NEXT: addi.w $sp, $sp, 16
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; CHECK-NEXT: ret
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%1 = call i32 @callee_double_in_gpr_exhausted_fprs(
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double 1.0, double 2.0, double 3.0, double 4.0, double 5.0, double 6.0,
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double 7.0, double 8.0, double 9.0)
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ret i32 %1
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}
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;; Check that the stack is used once the FPRs and GPRs are both exhausted.
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;; Must keep define on a single line due to an update_llc_test_checks.py limitation.
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define i32 @callee_double_on_stack_exhausted_fprs_gprs(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j, double %k, double %l, double %m, double %n) nounwind {
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; CHECK-LABEL: callee_double_on_stack_exhausted_fprs_gprs:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fld.d $fa0, $sp, 0
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; CHECK-NEXT: fld.d $fa1, $sp, 8
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; CHECK-NEXT: ftintrz.w.d $fa0, $fa0
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; CHECK-NEXT: movfr2gr.s $a0, $fa0
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; CHECK-NEXT: ftintrz.w.d $fa0, $fa1
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; CHECK-NEXT: movfr2gr.s $a1, $fa0
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; CHECK-NEXT: add.w $a0, $a0, $a1
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; CHECK-NEXT: ret
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%m_fptosi = fptosi double %m to i32
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%n_fptosi = fptosi double %n to i32
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%1 = add i32 %m_fptosi, %n_fptosi
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ret i32 %1
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}
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define i32 @caller_double_on_stack_exhausted_fprs_gprs() nounwind {
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; CHECK-LABEL: caller_double_on_stack_exhausted_fprs_gprs:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.w $sp, $sp, -32
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; CHECK-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
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; CHECK-NEXT: lu12i.w $a0, 262816
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; CHECK-NEXT: st.w $a0, $sp, 4
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; CHECK-NEXT: st.w $zero, $sp, 0
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; CHECK-NEXT: lu12i.w $a0, 262848
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; CHECK-NEXT: st.w $a0, $sp, 12
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; CHECK-NEXT: movgr2fr.w $fa7, $zero
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; CHECK-NEXT: lu12i.w $a0, 261888
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; CHECK-NEXT: fmov.d $fa0, $fa7
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; CHECK-NEXT: movgr2frh.w $fa0, $a0
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; CHECK-NEXT: lu12i.w $a0, 262144
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; CHECK-NEXT: fmov.d $fa1, $fa7
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; CHECK-NEXT: movgr2frh.w $fa1, $a0
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; CHECK-NEXT: lu12i.w $a0, 262400
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; CHECK-NEXT: fmov.d $fa3, $fa7
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; CHECK-NEXT: movgr2frh.w $fa3, $a0
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; CHECK-NEXT: lu12i.w $a0, 262656
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; CHECK-NEXT: movgr2frh.w $fa7, $a0
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; CHECK-NEXT: .Lpcadd_hi4:
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; CHECK-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI5_0)
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; CHECK-NEXT: fld.d $fa2, $a0, %pcadd_lo12(.Lpcadd_hi4)
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; CHECK-NEXT: .Lpcadd_hi5:
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; CHECK-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI5_1)
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; CHECK-NEXT: fld.d $fa4, $a0, %pcadd_lo12(.Lpcadd_hi5)
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; CHECK-NEXT: .Lpcadd_hi6:
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; CHECK-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI5_2)
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; CHECK-NEXT: fld.d $fa5, $a0, %pcadd_lo12(.Lpcadd_hi6)
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; CHECK-NEXT: .Lpcadd_hi7:
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; CHECK-NEXT: pcaddu12i $a0, %pcadd_hi20(.LCPI5_3)
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; CHECK-NEXT: fld.d $fa6, $a0, %pcadd_lo12(.Lpcadd_hi7)
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; CHECK-NEXT: lu12i.w $a1, 262688
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; CHECK-NEXT: lu12i.w $a3, 262720
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; CHECK-NEXT: lu12i.w $a5, 262752
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; CHECK-NEXT: lu12i.w $a7, 262784
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; CHECK-NEXT: st.w $zero, $sp, 8
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; CHECK-NEXT: move $a0, $zero
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; CHECK-NEXT: move $a2, $zero
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; CHECK-NEXT: move $a4, $zero
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; CHECK-NEXT: move $a6, $zero
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; CHECK-NEXT: bl callee_double_on_stack_exhausted_fprs_gprs
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; CHECK-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
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; CHECK-NEXT: addi.w $sp, $sp, 32
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; CHECK-NEXT: ret
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%1 = call i32 @callee_double_on_stack_exhausted_fprs_gprs(
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double 1.0, double 2.0, double 3.0, double 4.0, double 5.0, double 6.0,
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double 7.0, double 8.0, double 9.0, double 10.0, double 11.0, double 12.0,
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double 13.0, double 14.0)
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ret i32 %1
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}
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;; Check returning doubles.
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define double @callee_double_ret() nounwind {
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; CHECK-LABEL: callee_double_ret:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movgr2fr.w $fa0, $zero
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; CHECK-NEXT: lu12i.w $a0, 261888
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; CHECK-NEXT: movgr2frh.w $fa0, $a0
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; CHECK-NEXT: ret
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ret double 1.0
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}
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define i64 @caller_double_ret() nounwind {
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; CHECK-LABEL: caller_double_ret:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi.w $sp, $sp, -16
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; CHECK-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
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; CHECK-NEXT: bl callee_double_ret
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; CHECK-NEXT: movfr2gr.s $a0, $fa0
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; CHECK-NEXT: movfrh2gr.s $a1, $fa0
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; CHECK-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
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; CHECK-NEXT: addi.w $sp, $sp, 16
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; CHECK-NEXT: ret
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%1 = call double @callee_double_ret()
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%2 = bitcast double %1 to i64
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ret i64 %2
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}
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