Files
derek.holloway 7502bf64a4
CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

235 lines
7.9 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc --mtriple=loongarch32 -mattr=+32s,+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA32
; RUN: llc --mtriple=loongarch64 -mattr=+lsx < %s | FileCheck %s --check-prefixes=CHECK,LA64
; A load has more than one user shouldn't be lowered to vldrepl
define <2 x i64> @should_not_be_optimized(ptr %ptr, ptr %dst){
; LA32-LABEL: should_not_be_optimized:
; LA32: # %bb.0:
; LA32-NEXT: ld.w $a2, $a0, 0
; LA32-NEXT: ld.w $a0, $a0, 4
; LA32-NEXT: st.w $a2, $a1, 0
; LA32-NEXT: vinsgr2vr.w $vr0, $a2, 0
; LA32-NEXT: vinsgr2vr.w $vr0, $a0, 1
; LA32-NEXT: vreplvei.d $vr0, $vr0, 0
; LA32-NEXT: st.w $a0, $a1, 4
; LA32-NEXT: ret
;
; LA64-LABEL: should_not_be_optimized:
; LA64: # %bb.0:
; LA64-NEXT: ld.d $a0, $a0, 0
; LA64-NEXT: vreplgr2vr.d $vr0, $a0
; LA64-NEXT: st.d $a0, $a1, 0
; LA64-NEXT: ret
%tmp = load i64, ptr %ptr
store i64 %tmp, ptr %dst
%tmp1 = insertelement <2 x i64> zeroinitializer, i64 %tmp, i32 0
%tmp2 = shufflevector <2 x i64> %tmp1, <2 x i64> poison, <2 x i32> zeroinitializer
ret <2 x i64> %tmp2
}
define <8 x i16> @should_not_be_optimized_sext_load(ptr %ptr) {
; CHECK-LABEL: should_not_be_optimized_sext_load:
; CHECK: # %bb.0:
; CHECK-NEXT: ld.b $a0, $a0, 0
; CHECK-NEXT: vreplgr2vr.h $vr0, $a0
; CHECK-NEXT: ret
%tmp = load i8, ptr %ptr
%tmp1 = sext i8 %tmp to i16
%tmp2 = insertelement <8 x i16> zeroinitializer, i16 %tmp1, i32 0
%tmp3 = shufflevector <8 x i16> %tmp2, <8 x i16> poison, <8 x i32> zeroinitializer
ret <8 x i16> %tmp3
}
define <8 x i16> @should_not_be_optimized_zext_load(ptr %ptr) {
; CHECK-LABEL: should_not_be_optimized_zext_load:
; CHECK: # %bb.0:
; CHECK-NEXT: ld.bu $a0, $a0, 0
; CHECK-NEXT: vreplgr2vr.h $vr0, $a0
; CHECK-NEXT: ret
%tmp = load i8, ptr %ptr
%tmp1 = zext i8 %tmp to i16
%tmp2 = insertelement <8 x i16> zeroinitializer, i16 %tmp1, i32 0
%tmp3 = shufflevector <8 x i16> %tmp2, <8 x i16> poison, <8 x i32> zeroinitializer
ret <8 x i16> %tmp3
}
define <2 x i64> @vldrepl_d_unaligned_offset(ptr %ptr) {
; LA32-LABEL: vldrepl_d_unaligned_offset:
; LA32: # %bb.0:
; LA32-NEXT: ld.w $a1, $a0, 4
; LA32-NEXT: ld.w $a0, $a0, 8
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 0
; LA32-NEXT: vinsgr2vr.w $vr0, $a0, 1
; LA32-NEXT: vreplvei.d $vr0, $vr0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: vldrepl_d_unaligned_offset:
; LA64: # %bb.0:
; LA64-NEXT: addi.d $a0, $a0, 4
; LA64-NEXT: vldrepl.d $vr0, $a0, 0
; LA64-NEXT: ret
%p = getelementptr i32, ptr %ptr, i32 1
%tmp = load i64, ptr %p
%tmp1 = insertelement <2 x i64> zeroinitializer, i64 %tmp, i32 0
%tmp2 = shufflevector <2 x i64> %tmp1, <2 x i64> poison, <2 x i32> zeroinitializer
ret <2 x i64> %tmp2
}
define <16 x i8> @vldrepl_b(ptr %ptr) {
; CHECK-LABEL: vldrepl_b:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.b $vr0, $a0, 0
; CHECK-NEXT: ret
%tmp = load i8, ptr %ptr
%tmp1 = insertelement <16 x i8> zeroinitializer, i8 %tmp, i32 0
%tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> poison, <16 x i32> zeroinitializer
ret <16 x i8> %tmp2
}
define <16 x i8> @vldrepl_b_offset(ptr %ptr) {
; CHECK-LABEL: vldrepl_b_offset:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.b $vr0, $a0, 33
; CHECK-NEXT: ret
%p = getelementptr i8, ptr %ptr, i64 33
%tmp = load i8, ptr %p
%tmp1 = insertelement <16 x i8> zeroinitializer, i8 %tmp, i32 0
%tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> poison, <16 x i32> zeroinitializer
ret <16 x i8> %tmp2
}
define <8 x i16> @vldrepl_h(ptr %ptr) {
; CHECK-LABEL: vldrepl_h:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.h $vr0, $a0, 0
; CHECK-NEXT: ret
%tmp = load i16, ptr %ptr
%tmp1 = insertelement <8 x i16> zeroinitializer, i16 %tmp, i32 0
%tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> poison, <8 x i32> zeroinitializer
ret <8 x i16> %tmp2
}
define <8 x i16> @vldrepl_h_offset(ptr %ptr) {
; CHECK-LABEL: vldrepl_h_offset:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.h $vr0, $a0, 66
; CHECK-NEXT: ret
%p = getelementptr i16, ptr %ptr, i64 33
%tmp = load i16, ptr %p
%tmp1 = insertelement <8 x i16> zeroinitializer, i16 %tmp, i32 0
%tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> poison, <8 x i32> zeroinitializer
ret <8 x i16> %tmp2
}
define <4 x i32> @vldrepl_w(ptr %ptr) {
; CHECK-LABEL: vldrepl_w:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.w $vr0, $a0, 0
; CHECK-NEXT: ret
%tmp = load i32, ptr %ptr
%tmp1 = insertelement <4 x i32> zeroinitializer, i32 %tmp, i32 0
%tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> poison, <4 x i32> zeroinitializer
ret <4 x i32> %tmp2
}
define <4 x i32> @vldrepl_w_offset(ptr %ptr) {
; CHECK-LABEL: vldrepl_w_offset:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.w $vr0, $a0, 132
; CHECK-NEXT: ret
%p = getelementptr i32, ptr %ptr, i64 33
%tmp = load i32, ptr %p
%tmp1 = insertelement <4 x i32> zeroinitializer, i32 %tmp, i32 0
%tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> poison, <4 x i32> zeroinitializer
ret <4 x i32> %tmp2
}
define <2 x i64> @vldrepl_d(ptr %ptr) {
; LA32-LABEL: vldrepl_d:
; LA32: # %bb.0:
; LA32-NEXT: ld.w $a1, $a0, 0
; LA32-NEXT: ld.w $a0, $a0, 4
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 0
; LA32-NEXT: vinsgr2vr.w $vr0, $a0, 1
; LA32-NEXT: vreplvei.d $vr0, $vr0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: vldrepl_d:
; LA64: # %bb.0:
; LA64-NEXT: vldrepl.d $vr0, $a0, 0
; LA64-NEXT: ret
%tmp = load i64, ptr %ptr
%tmp1 = insertelement <2 x i64> zeroinitializer, i64 %tmp, i32 0
%tmp2 = shufflevector <2 x i64> %tmp1, <2 x i64> poison, <2 x i32> zeroinitializer
ret <2 x i64> %tmp2
}
define <2 x i64> @vldrepl_d_offset(ptr %ptr) {
; LA32-LABEL: vldrepl_d_offset:
; LA32: # %bb.0:
; LA32-NEXT: ld.w $a1, $a0, 264
; LA32-NEXT: ld.w $a0, $a0, 268
; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 0
; LA32-NEXT: vinsgr2vr.w $vr0, $a0, 1
; LA32-NEXT: vreplvei.d $vr0, $vr0, 0
; LA32-NEXT: ret
;
; LA64-LABEL: vldrepl_d_offset:
; LA64: # %bb.0:
; LA64-NEXT: vldrepl.d $vr0, $a0, 264
; LA64-NEXT: ret
%p = getelementptr i64, ptr %ptr, i64 33
%tmp = load i64, ptr %p
%tmp1 = insertelement <2 x i64> zeroinitializer, i64 %tmp, i32 0
%tmp2 = shufflevector <2 x i64> %tmp1, <2 x i64> poison, <2 x i32> zeroinitializer
ret <2 x i64> %tmp2
}
define <4 x float> @vldrepl_w_flt(ptr %ptr) {
; CHECK-LABEL: vldrepl_w_flt:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.w $vr0, $a0, 0
; CHECK-NEXT: ret
%tmp = load float, ptr %ptr
%tmp1 = insertelement <4 x float> zeroinitializer, float %tmp, i32 0
%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> poison, <4 x i32> zeroinitializer
ret <4 x float> %tmp2
}
define <4 x float> @vldrepl_w_flt_offset(ptr %ptr) {
; CHECK-LABEL: vldrepl_w_flt_offset:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.w $vr0, $a0, 264
; CHECK-NEXT: ret
%p = getelementptr i64, ptr %ptr, i64 33
%tmp = load float, ptr %p
%tmp1 = insertelement <4 x float> zeroinitializer, float %tmp, i32 0
%tmp2 = shufflevector <4 x float> %tmp1, <4 x float> poison, <4 x i32> zeroinitializer
ret <4 x float> %tmp2
}
define <2 x double> @vldrepl_d_dbl(ptr %ptr) {
; CHECK-LABEL: vldrepl_d_dbl:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.d $vr0, $a0, 0
; CHECK-NEXT: ret
%tmp = load double, ptr %ptr
%tmp1 = insertelement <2 x double> zeroinitializer, double %tmp, i32 0
%tmp2 = shufflevector <2 x double> %tmp1, <2 x double> poison, <2 x i32> zeroinitializer
ret <2 x double> %tmp2
}
define <2 x double> @vldrepl_d_dbl_offset(ptr %ptr) {
; CHECK-LABEL: vldrepl_d_dbl_offset:
; CHECK: # %bb.0:
; CHECK-NEXT: vldrepl.d $vr0, $a0, 264
; CHECK-NEXT: ret
%p = getelementptr i64, ptr %ptr, i64 33
%tmp = load double, ptr %p
%tmp1 = insertelement <2 x double> zeroinitializer, double %tmp, i32 0
%tmp2 = shufflevector <2 x double> %tmp1, <2 x double> poison, <2 x i32> zeroinitializer
ret <2 x double> %tmp2
}