derek.holloway
7502bf64a4
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61 lines
2.5 KiB
LLVM
61 lines
2.5 KiB
LLVM
; RUN: llc -mtriple=mips -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=pic < %s 2>&1 | FileCheck --check-prefix=PIC %s
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; RUN: llc -mtriple=mips -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=static < %s 2>&1 | FileCheck --check-prefix=STATIC %s
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; RUN: llc -mtriple=mips64 -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=pic < %s 2>&1 | FileCheck --check-prefix=PIC64 %s
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; RUN: llc -mtriple=mips64 -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=static < %s 2>&1 | FileCheck --check-prefix=STATIC64 %s
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; RUN: llc -mtriple=mips -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=pic -mattr=+micromips < %s 2>&1 | FileCheck --check-prefix=PIC %s
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; RUN: llc -mtriple=mips -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=static -mattr=+micromips < %s 2>&1 | FileCheck --check-prefix=STATIC-MM %s
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; RUN: llc -mtriple=mips -mcpu=mips32r6 -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=pic -mattr=+micromips < %s 2>&1 | FileCheck --check-prefix=PIC %s
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; RUN: llc -mtriple=mips -mcpu=mips32r6 -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=static -mattr=+micromips < %s 2>&1 | FileCheck --check-prefix=STATIC-MM %s
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; RUN: llc -mtriple=mips -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=pic -mattr=+mips16 < %s 2>&1 | FileCheck --check-prefix=MIPS16 %s
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; RUN: llc -mtriple=mips -debug-only=isel -mips-tail-calls=1 \
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; RUN: -relocation-model=static -mattr=+mips16 < %s 2>&1 | FileCheck --check-prefix=MIPS16 %s
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; REQUIRES: asserts
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; Test that the correct pseudo instructions are generated for indirect
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; branches and tail calls. Previously, the order of the DAG matcher table
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; determined if the correct instruction was selected for mips16.
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declare protected void @a()
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define void @test1(i32 %a) {
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entry:
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%0 = trunc i32 %a to i1
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%1 = select i1 %0,
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ptr blockaddress(@test1, %bb),
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ptr blockaddress(@test1, %bb6)
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indirectbr ptr %1, [label %bb, label %bb6]
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; STATIC: PseudoIndirectBranch
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; STATIC-MM: PseudoIndirectBranch
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; STATIC-NOT: PseudoIndirectBranch64
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; STATIC64: PseudoIndirectBranch64
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; PIC: PseudoIndirectBranch
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; PIC-NOT: PseudoIndirectBranch64
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; PIC64: PseudoIndirectBranch64
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; MIPS16: JrcRx16
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bb:
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ret void
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bb6:
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tail call void @a()
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; STATIC: TAILCALL
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; STATIC-NOT: TAILCALL_MM
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; STATIC-MM: TAILCALL_MM
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; PIC: TAILCALLREG
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; PIC-NOT: TAILCALLREG64
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; PIC64: TAILCALLREG64
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; MIPS16: RetRA16
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ret void
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}
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