derek.holloway
7502bf64a4
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79 lines
3.1 KiB
LLVM
79 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_32 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_32 | %ptxas-verify %}
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declare float @llvm.nvvm.atomic.load.add.f32.p0(ptr %addr, float %val)
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; CHECK-LABEL: atomic_add_f32_generic
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define float @atomic_add_f32_generic(ptr %addr, float %val) {
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; CHECK-LABEL: atomic_add_f32_generic(
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; CHECK: {
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; CHECK-NEXT: .reg .pred %p<2>;
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; CHECK-NEXT: .reg .b32 %r<5>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r2, [atomic_add_f32_generic_param_1];
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; CHECK-NEXT: ld.param.b64 %rd1, [atomic_add_f32_generic_param_0];
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; CHECK-NEXT: ld.volatile.b32 %r4, [%rd1];
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; CHECK-NEXT: $L__BB0_1: // %atomicrmw.start
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: add.rn.f32 %r3, %r4, %r2;
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; CHECK-NEXT: atom.cas.b32 %r1, [%rd1], %r4, %r3;
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; CHECK-NEXT: setp.ne.b32 %p1, %r1, %r4;
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; CHECK-NEXT: mov.b32 %r4, %r1;
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; CHECK-NEXT: @%p1 bra $L__BB0_1;
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; CHECK-NEXT: // %bb.2: // %atomicrmw.end
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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%ret = call float @llvm.nvvm.atomic.load.add.f32.p0(ptr %addr, float %val)
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ret float %ret
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}
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declare float @llvm.nvvm.atomic.load.add.f32.p1(ptr addrspace(1) %addr, float %val)
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; CHECK-LABEL: atomic_add_f32_addrspace1
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define float @atomic_add_f32_addrspace1(ptr addrspace(1) %addr, float %val) {
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; CHECK-LABEL: atomic_add_f32_addrspace1(
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; CHECK: {
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; CHECK-NEXT: .reg .pred %p<2>;
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; CHECK-NEXT: .reg .b32 %r<5>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r2, [atomic_add_f32_addrspace1_param_1];
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; CHECK-NEXT: ld.param.b64 %rd1, [atomic_add_f32_addrspace1_param_0];
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; CHECK-NEXT: ld.volatile.global.b32 %r4, [%rd1];
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; CHECK-NEXT: $L__BB1_1: // %atomicrmw.start
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; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: add.rn.f32 %r3, %r4, %r2;
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; CHECK-NEXT: atom.global.cas.b32 %r1, [%rd1], %r4, %r3;
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; CHECK-NEXT: setp.ne.b32 %p1, %r1, %r4;
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; CHECK-NEXT: mov.b32 %r4, %r1;
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; CHECK-NEXT: @%p1 bra $L__BB1_1;
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; CHECK-NEXT: // %bb.2: // %atomicrmw.end
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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%ret = call float @llvm.nvvm.atomic.load.add.f32.p1(ptr addrspace(1) %addr, float %val)
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ret float %ret
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}
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declare float @llvm.nvvm.atomic.load.add.f32.p3(ptr addrspace(3) %addr, float %val)
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; CHECK-LABEL: atomic_add_f32_addrspace3
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define float @atomic_add_f32_addrspace3(ptr addrspace(3) %addr, float %val) {
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; CHECK-LABEL: atomic_add_f32_addrspace3(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<3>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b64 %rd1, [atomic_add_f32_addrspace3_param_0];
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; CHECK-NEXT: ld.param.b32 %r1, [atomic_add_f32_addrspace3_param_1];
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; CHECK-NEXT: atom.shared.add.f32 %r2, [%rd1], %r1;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r2;
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; CHECK-NEXT: ret;
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%ret = call float @llvm.nvvm.atomic.load.add.f32.p3(ptr addrspace(3) %addr, float %val)
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ret float %ret
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}
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