derek.holloway
7502bf64a4
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197 lines
5.3 KiB
LLVM
197 lines
5.3 KiB
LLVM
; RUN: llc < %s -mtriple=nvptx -mcpu=sm_53 | FileCheck %s
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_53 | FileCheck %s
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; RUN: %if ptxas-ptr32 %{ llc < %s -mtriple=nvptx -mcpu=sm_53 | %ptxas-verify %}
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_53 | %ptxas-verify %}
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define i16 @cvt_u16_f32(float %x) {
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; CHECK: cvt.rzi.u16.f32 %rs{{[0-9]+}}, %r{{[0-9]+}};
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; CHECK: ret;
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%a = fptoui float %x to i16
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ret i16 %a
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}
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define i16 @cvt_u16_f64(double %x) {
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; CHECK: cvt.rzi.u16.f64 %rs{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK: ret;
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%a = fptoui double %x to i16
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ret i16 %a
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}
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define i32 @cvt_u32_f32(float %x) {
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; CHECK: cvt.rzi.u32.f32 %r{{[0-9]+}}, %r{{[0-9]+}};
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; CHECK: ret;
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%a = fptoui float %x to i32
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ret i32 %a
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}
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define i32 @cvt_u32_f64(double %x) {
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; CHECK: cvt.rzi.u32.f64 %r{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK: ret;
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%a = fptoui double %x to i32
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ret i32 %a
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}
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define i64 @cvt_u64_f32(float %x) {
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; CHECK: cvt.rzi.u64.f32 %rd{{[0-9]+}}, %r{{[0-9]+}};
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; CHECK: ret;
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%a = fptoui float %x to i64
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ret i64 %a
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}
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define i64 @cvt_u64_f64(double %x) {
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; CHECK: cvt.rzi.u64.f64 %rd{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK: ret;
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%a = fptoui double %x to i64
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ret i64 %a
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}
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define float @cvt_f32_i16(i16 %x) {
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; CHECK: cvt.rn.f32.u16 %r{{[0-9]+}}, %rs{{[0-9]+}};
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; CHECK: ret;
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%a = uitofp i16 %x to float
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ret float %a
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}
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define float @cvt_f32_i32(i32 %x) {
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; CHECK: cvt.rn.f32.u32 %r{{[0-9]+}}, %r{{[0-9]+}};
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; CHECK: ret;
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%a = uitofp i32 %x to float
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ret float %a
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}
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define float @cvt_f32_i64(i64 %x) {
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; CHECK: cvt.rn.f32.u64 %r{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK: ret;
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%a = uitofp i64 %x to float
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ret float %a
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}
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define double @cvt_f64_i16(i16 %x) {
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; CHECK: cvt.rn.f64.u16 %rd{{[0-9]+}}, %rs{{[0-9]+}};
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; CHECK: ret;
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%a = uitofp i16 %x to double
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ret double %a
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}
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define double @cvt_f64_i32(i32 %x) {
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; CHECK: cvt.rn.f64.u32 %rd{{[0-9]+}}, %r{{[0-9]+}};
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; CHECK: ret;
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%a = uitofp i32 %x to double
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ret double %a
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}
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define double @cvt_f64_i64(i64 %x) {
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; CHECK: cvt.rn.f64.u64 %rd{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK: ret;
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%a = uitofp i64 %x to double
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ret double %a
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}
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define float @cvt_f32_f64(double %x) {
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; CHECK: cvt.rn.f32.f64 %r{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK: ret;
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%a = fptrunc double %x to float
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ret float %a
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}
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define double @cvt_f64_f32(float %x) {
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; CHECK: cvt.f64.f32 %rd{{[0-9]+}}, %r{{[0-9]+}};
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; CHECK: ret;
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%a = fpext float %x to double
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ret double %a
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}
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define float @cvt_f32_s16(i16 %x) {
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; CHECK: cvt.rn.f32.s16 %r{{[0-9]+}}, %rs{{[0-9]+}}
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; CHECK: ret
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%a = sitofp i16 %x to float
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ret float %a
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}
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define float @cvt_f32_s32(i32 %x) {
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; CHECK: cvt.rn.f32.s32 %r{{[0-9]+}}, %r{{[0-9]+}}
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; CHECK: ret
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%a = sitofp i32 %x to float
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ret float %a
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}
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define float @cvt_f32_s64(i64 %x) {
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; CHECK: cvt.rn.f32.s64 %r{{[0-9]+}}, %rd{{[0-9]+}}
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; CHECK: ret
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%a = sitofp i64 %x to float
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ret float %a
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}
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define double @cvt_f64_s16(i16 %x) {
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; CHECK: cvt.rn.f64.s16 %rd{{[0-9]+}}, %rs{{[0-9]+}}
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; CHECK: ret
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%a = sitofp i16 %x to double
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ret double %a
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}
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define double @cvt_f64_s32(i32 %x) {
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; CHECK: cvt.rn.f64.s32 %rd{{[0-9]+}}, %r{{[0-9]+}}
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; CHECK: ret
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%a = sitofp i32 %x to double
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ret double %a
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}
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define double @cvt_f64_s64(i64 %x) {
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; CHECK: cvt.rn.f64.s64 %rd{{[0-9]+}}, %rd{{[0-9]+}}
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; CHECK: ret
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%a = sitofp i64 %x to double
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ret double %a
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}
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define i16 @cvt_s16_f32(float %x) {
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; CHECK: cvt.rzi.s16.f32 %rs{{[0-9]+}}, %r{{[0-9]+}};
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; CHECK: ret;
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%a = fptosi float %x to i16
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ret i16 %a
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}
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define i16 @cvt_s16_f64(double %x) {
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; CHECK: cvt.rzi.s16.f64 %rs{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK: ret;
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%a = fptosi double %x to i16
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ret i16 %a
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}
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define i32 @cvt_s32_f32(float %x) {
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; CHECK: cvt.rzi.s32.f32 %r{{[0-9]+}}, %r{{[0-9]+}};
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; CHECK: ret;
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%a = fptosi float %x to i32
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ret i32 %a
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}
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define i32 @cvt_s32_f64(double %x) {
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; CHECK: cvt.rzi.s32.f64 %r{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK: ret;
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%a = fptosi double %x to i32
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ret i32 %a
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}
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define i64 @cvt_s64_f32(float %x) {
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; CHECK: cvt.rzi.s64.f32 %rd{{[0-9]+}}, %r{{[0-9]+}};
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; CHECK: ret;
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%a = fptosi float %x to i64
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ret i64 %a
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}
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define i64 @cvt_s64_f64(double %x) {
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; CHECK: cvt.rzi.s64.f64 %rd{{[0-9]+}}, %rd{{[0-9]+}};
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; CHECK: ret;
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%a = fptosi double %x to i64
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ret i64 %a
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}
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; fptoui/fptosi to i1 truncate toward zero, so the result is just
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; (x >= 1.0) / (x <= -1.0) — a single fp compare.
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; CHECK-LABEL: cvt_u1_f32
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; CHECK: setp.ge.f32 %p{{[0-9]+}}, %r{{[0-9]+}}, 0f3F800000;
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; CHECK: ret;
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define i1 @cvt_u1_f32(float %x) { %a = fptoui float %x to i1 ret i1 %a }
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; CHECK-LABEL: cvt_s1_f32
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; CHECK: setp.le.f32 %p{{[0-9]+}}, %r{{[0-9]+}}, 0fBF800000;
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; CHECK: ret;
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define i1 @cvt_s1_f32(float %x) { %a = fptosi float %x to i1 ret i1 %a }
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; CHECK-LABEL: cvt_u1_f64(
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; CHECK: setp.ge.f64 %p{{[0-9]+}}, %rd{{[0-9]+}}, 0d3FF0000000000000;
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define i1 @cvt_u1_f64(double %x) { %a = fptoui double %x to i1 ret i1 %a }
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; CHECK-LABEL: cvt_s1_f64(
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; CHECK: setp.le.f64 %p{{[0-9]+}}, %rd{{[0-9]+}}, 0dBFF0000000000000;
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define i1 @cvt_s1_f64(double %x) { %a = fptosi double %x to i1 ret i1 %a }
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; CHECK-LABEL: cvt_u1_f16(
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; CHECK: mov.b16 %rs{{[0-9]+}}, 0x3C00;
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; CHECK: setp.ge.f16 %p{{[0-9]+}}, %rs{{[0-9]+}}, %rs{{[0-9]+}};
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define i1 @cvt_u1_f16(half %x) { %a = fptoui half %x to i1 ret i1 %a }
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; CHECK-LABEL: cvt_s1_f16(
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; CHECK: mov.b16 %rs{{[0-9]+}}, 0xBC00;
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; CHECK: setp.le.f16 %p{{[0-9]+}}, %rs{{[0-9]+}}, %rs{{[0-9]+}};
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define i1 @cvt_s1_f16(half %x) { %a = fptosi half %x to i1 ret i1 %a }
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