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TheRock/compiler/amd-llvm/llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-rollback.mir
derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
# RUN: llc -mtriple=nvptx64 -mcpu=sm_100 -run-pass=machine-cse -o - %s | FileCheck %s
---
name: rollback
tracksRegLiveness: true
body: |
; CHECK-LABEL: name: rollback
; CHECK: bb.0:
; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.4(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[DEF:%[0-9]+]]:b32 = IMPLICIT_DEF
; CHECK-NEXT: [[DEF1:%[0-9]+]]:b32 = IMPLICIT_DEF
; CHECK-NEXT: [[SETP_i32rr:%[0-9]+]]:b1 = SETP_i32rr [[DEF]], [[DEF1]], 0
; CHECK-NEXT: CBranch [[SETP_i32rr]], %bb.4, 0
; CHECK-NEXT: GOTO %bb.1
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.1:
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.4(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[SETP_i32rr1:%[0-9]+]]:b1 = SETP_i32rr [[DEF]], [[DEF1]], 1
; CHECK-NEXT: CBranch [[SETP_i32rr1]], %bb.4, 0
; CHECK-NEXT: GOTO %bb.2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.2:
; CHECK-NEXT: successors: %bb.3(0x40000000), %bb.4(0x40000000)
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: CBranch [[SETP_i32rr1]], %bb.4, 0
; CHECK-NEXT: CBranch [[SETP_i32rr1]], %bb.4, 0
; CHECK-NEXT: GOTO %bb.3
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.3:
; CHECK-NEXT: Return
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: bb.4:
; CHECK-NEXT: Return
bb.0:
successors: %bb.1, %bb.4
%0:b32 = IMPLICIT_DEF
%1:b32 = IMPLICIT_DEF
%2:b1 = SETP_i32rr %0, %1, 0
CBranch %2, %bb.4, 0
GOTO %bb.1
bb.1:
successors: %bb.2, %bb.4
%3:b1 = SETP_i32rr %0, %1, 1
CBranch %3, %bb.4, 0
GOTO %bb.2
bb.2:
successors: %bb.3, %bb.4
CBranch %3, %bb.4, 0
CBranch %3, %bb.4, 0
GOTO %bb.3
bb.3:
Return
bb.4:
Return
...