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TheRock/compiler/amd-llvm/llvm/test/CodeGen/NVPTX/mixed-precision-fp.ll
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_100 -mattr=+ptx86 | FileCheck --check-prefixes=CHECK,CHECK-NOF32FTZ %s
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_100 -mattr=+ptx86 -denormal-fp-math=preserve-sign | FileCheck --check-prefixes=CHECK,CHECK-F32FTZ %s
; RUN: %if ptxas-sm_100 %{ llc < %s -mtriple=nvptx64 -mcpu=sm_100 -mattr=+ptx86 | %ptxas-verify -arch=sm_100 %}
; RUN: %if ptxas-sm_100 %{ llc < %s -mtriple=nvptx64 -mcpu=sm_100 -mattr=+ptx86 -denormal-fp-math=preserve-sign | %ptxas-verify -arch=sm_100 %}
; ADD
define float @test_add_f32_f16_1(half %a, float %b) {
; CHECK-LABEL: test_add_f32_f16_1(
; CHECK: {
; CHECK-NEXT: .reg .b16 %rs<2>;
; CHECK-NEXT: .reg .b32 %r<10>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b16 %rs1, [test_add_f32_f16_1_param_0];
; CHECK-NEXT: ld.param.b32 %r1, [test_add_f32_f16_1_param_1];
; CHECK-NEXT: add.rn.f32.f16 %r2, %rs1, %r1;
; CHECK-NEXT: add.rz.f32.f16 %r3, %rs1, %r2;
; CHECK-NEXT: add.rm.f32.f16 %r4, %rs1, %r3;
; CHECK-NEXT: add.rp.f32.f16 %r5, %rs1, %r4;
; CHECK-NEXT: add.rn.sat.f32.f16 %r6, %rs1, %r5;
; CHECK-NEXT: add.rz.sat.f32.f16 %r7, %rs1, %r6;
; CHECK-NEXT: add.rm.sat.f32.f16 %r8, %rs1, %r7;
; CHECK-NEXT: add.rp.sat.f32.f16 %r9, %rs1, %r8;
; CHECK-NEXT: st.param.b32 [func_retval0], %r9;
; CHECK-NEXT: ret;
%r0 = fpext half %a to float
%r1 = call float @llvm.nvvm.add.rn.f(float %r0, float %b)
%r2 = call float @llvm.nvvm.add.rz.f(float %r0, float %r1)
%r3 = call float @llvm.nvvm.add.rm.f(float %r0, float %r2)
%r4 = call float @llvm.nvvm.add.rp.f(float %r0, float %r3)
; SAT
%r5 = call float @llvm.nvvm.add.rn.sat.f(float %r0, float %r4)
%r6 = call float @llvm.nvvm.add.rz.sat.f(float %r0, float %r5)
%r7 = call float @llvm.nvvm.add.rm.sat.f(float %r0, float %r6)
%r8 = call float @llvm.nvvm.add.rp.sat.f(float %r0, float %r7)
ret float %r8
}
define float @test_add_f32_f16_2(half %a, float %b) {
; CHECK-NOF32FTZ-LABEL: test_add_f32_f16_2(
; CHECK-NOF32FTZ: {
; CHECK-NOF32FTZ-NEXT: .reg .b16 %rs<2>;
; CHECK-NOF32FTZ-NEXT: .reg .b32 %r<3>;
; CHECK-NOF32FTZ-EMPTY:
; CHECK-NOF32FTZ-NEXT: // %bb.0:
; CHECK-NOF32FTZ-NEXT: ld.param.b16 %rs1, [test_add_f32_f16_2_param_0];
; CHECK-NOF32FTZ-NEXT: ld.param.b32 %r1, [test_add_f32_f16_2_param_1];
; CHECK-NOF32FTZ-NEXT: add.rn.f32.f16 %r2, %rs1, %r1;
; CHECK-NOF32FTZ-NEXT: st.param.b32 [func_retval0], %r2;
; CHECK-NOF32FTZ-NEXT: ret;
;
; CHECK-F32FTZ-LABEL: test_add_f32_f16_2(
; CHECK-F32FTZ: {
; CHECK-F32FTZ-NEXT: .reg .b16 %rs<2>;
; CHECK-F32FTZ-NEXT: .reg .b32 %r<4>;
; CHECK-F32FTZ-EMPTY:
; CHECK-F32FTZ-NEXT: // %bb.0:
; CHECK-F32FTZ-NEXT: ld.param.b16 %rs1, [test_add_f32_f16_2_param_0];
; CHECK-F32FTZ-NEXT: cvt.ftz.f32.f16 %r1, %rs1;
; CHECK-F32FTZ-NEXT: ld.param.b32 %r2, [test_add_f32_f16_2_param_1];
; CHECK-F32FTZ-NEXT: add.rn.ftz.f32 %r3, %r1, %r2;
; CHECK-F32FTZ-NEXT: st.param.b32 [func_retval0], %r3;
; CHECK-F32FTZ-NEXT: ret;
%r0 = fpext half %a to float
%r1 = fadd float %r0, %b
ret float %r1
}
define float @test_add_f32_bf16_1(bfloat %a, float %b) {
; CHECK-LABEL: test_add_f32_bf16_1(
; CHECK: {
; CHECK-NEXT: .reg .b16 %rs<2>;
; CHECK-NEXT: .reg .b32 %r<10>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b16 %rs1, [test_add_f32_bf16_1_param_0];
; CHECK-NEXT: ld.param.b32 %r1, [test_add_f32_bf16_1_param_1];
; CHECK-NEXT: add.rn.f32.bf16 %r2, %rs1, %r1;
; CHECK-NEXT: add.rz.f32.bf16 %r3, %rs1, %r2;
; CHECK-NEXT: add.rm.f32.bf16 %r4, %rs1, %r3;
; CHECK-NEXT: add.rp.f32.bf16 %r5, %rs1, %r4;
; CHECK-NEXT: add.rn.sat.f32.bf16 %r6, %rs1, %r5;
; CHECK-NEXT: add.rz.sat.f32.bf16 %r7, %rs1, %r6;
; CHECK-NEXT: add.rm.sat.f32.bf16 %r8, %rs1, %r7;
; CHECK-NEXT: add.rp.sat.f32.bf16 %r9, %rs1, %r8;
; CHECK-NEXT: st.param.b32 [func_retval0], %r9;
; CHECK-NEXT: ret;
%r0 = fpext bfloat %a to float
%r1 = call float @llvm.nvvm.add.rn.f(float %r0, float %b)
%r2 = call float @llvm.nvvm.add.rz.f(float %r0, float %r1)
%r3 = call float @llvm.nvvm.add.rm.f(float %r0, float %r2)
%r4 = call float @llvm.nvvm.add.rp.f(float %r0, float %r3)
; SAT
%r5 = call float @llvm.nvvm.add.rn.sat.f(float %r0, float %r4)
%r6 = call float @llvm.nvvm.add.rz.sat.f(float %r0, float %r5)
%r7 = call float @llvm.nvvm.add.rm.sat.f(float %r0, float %r6)
%r8 = call float @llvm.nvvm.add.rp.sat.f(float %r0, float %r7)
ret float %r8
}
define float @test_add_f32_bf16_2(bfloat %a, float %b) {
; CHECK-NOF32FTZ-LABEL: test_add_f32_bf16_2(
; CHECK-NOF32FTZ: {
; CHECK-NOF32FTZ-NEXT: .reg .b16 %rs<2>;
; CHECK-NOF32FTZ-NEXT: .reg .b32 %r<3>;
; CHECK-NOF32FTZ-EMPTY:
; CHECK-NOF32FTZ-NEXT: // %bb.0:
; CHECK-NOF32FTZ-NEXT: ld.param.b16 %rs1, [test_add_f32_bf16_2_param_0];
; CHECK-NOF32FTZ-NEXT: ld.param.b32 %r1, [test_add_f32_bf16_2_param_1];
; CHECK-NOF32FTZ-NEXT: add.rn.f32.bf16 %r2, %rs1, %r1;
; CHECK-NOF32FTZ-NEXT: st.param.b32 [func_retval0], %r2;
; CHECK-NOF32FTZ-NEXT: ret;
;
; CHECK-F32FTZ-LABEL: test_add_f32_bf16_2(
; CHECK-F32FTZ: {
; CHECK-F32FTZ-NEXT: .reg .b16 %rs<2>;
; CHECK-F32FTZ-NEXT: .reg .b32 %r<4>;
; CHECK-F32FTZ-EMPTY:
; CHECK-F32FTZ-NEXT: // %bb.0:
; CHECK-F32FTZ-NEXT: ld.param.b16 %rs1, [test_add_f32_bf16_2_param_0];
; CHECK-F32FTZ-NEXT: cvt.ftz.f32.bf16 %r1, %rs1;
; CHECK-F32FTZ-NEXT: ld.param.b32 %r2, [test_add_f32_bf16_2_param_1];
; CHECK-F32FTZ-NEXT: add.rn.ftz.f32 %r3, %r1, %r2;
; CHECK-F32FTZ-NEXT: st.param.b32 [func_retval0], %r3;
; CHECK-F32FTZ-NEXT: ret;
%r0 = fpext bfloat %a to float
%r1 = fadd float %r0, %b
ret float %r1
}
; SUB
define float @test_sub_f32_f16_1(half %a, float %b) {
; CHECK-LABEL: test_sub_f32_f16_1(
; CHECK: {
; CHECK-NEXT: .reg .b16 %rs<2>;
; CHECK-NEXT: .reg .b32 %r<9>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b16 %rs1, [test_sub_f32_f16_1_param_0];
; CHECK-NEXT: ld.param.b32 %r1, [test_sub_f32_f16_1_param_1];
; CHECK-NEXT: sub.rn.f32.f16 %r2, %rs1, %r1;
; CHECK-NEXT: sub.rz.f32.f16 %r3, %rs1, %r2;
; CHECK-NEXT: sub.rm.f32.f16 %r4, %rs1, %r3;
; CHECK-NEXT: sub.rm.f32.f16 %r5, %rs1, %r4;
; CHECK-NEXT: sub.rn.sat.f32.f16 %r6, %rs1, %r5;
; CHECK-NEXT: sub.rz.sat.f32.f16 %r7, %rs1, %r6;
; CHECK-NEXT: sub.rm.sat.f32.f16 %r8, %rs1, %r7;
; CHECK-NEXT: st.param.b32 [func_retval0], %r8;
; CHECK-NEXT: ret;
%r0 = fpext half %a to float
%f0 = fneg float %b
%r1 = call float @llvm.nvvm.add.rn.f(float %r0, float %f0)
%f1 = fneg float %r1
%r2 = call float @llvm.nvvm.add.rz.f(float %r0, float %f1)
%f2 = fneg float %r2
%r3 = call float @llvm.nvvm.add.rm.f(float %r0, float %f2)
%f3 = fneg float %r3
%r4 = call float @llvm.nvvm.add.rm.f(float %r0, float %f3)
; SAT
%f4 = fneg float %r4
%r5 = call float @llvm.nvvm.add.rn.sat.f(float %r0, float %f4)
%f5 = fneg float %r5
%r6 = call float @llvm.nvvm.add.rz.sat.f(float %r0, float %f5)
%f6 = fneg float %r6
%r7 = call float @llvm.nvvm.add.rm.sat.f(float %r0, float %f6)
%f7 = fneg float %r7
%r8 = call float @llvm.nvvm.add.rp.sat.f(float %r0, float %f7)
ret float %r7
}
define float @test_sub_f32_f16_2(half %a, float %b) {
; CHECK-NOF32FTZ-LABEL: test_sub_f32_f16_2(
; CHECK-NOF32FTZ: {
; CHECK-NOF32FTZ-NEXT: .reg .b16 %rs<2>;
; CHECK-NOF32FTZ-NEXT: .reg .b32 %r<3>;
; CHECK-NOF32FTZ-EMPTY:
; CHECK-NOF32FTZ-NEXT: // %bb.0:
; CHECK-NOF32FTZ-NEXT: ld.param.b16 %rs1, [test_sub_f32_f16_2_param_0];
; CHECK-NOF32FTZ-NEXT: ld.param.b32 %r1, [test_sub_f32_f16_2_param_1];
; CHECK-NOF32FTZ-NEXT: sub.rn.f32.f16 %r2, %rs1, %r1;
; CHECK-NOF32FTZ-NEXT: st.param.b32 [func_retval0], %r2;
; CHECK-NOF32FTZ-NEXT: ret;
;
; CHECK-F32FTZ-LABEL: test_sub_f32_f16_2(
; CHECK-F32FTZ: {
; CHECK-F32FTZ-NEXT: .reg .b16 %rs<2>;
; CHECK-F32FTZ-NEXT: .reg .b32 %r<4>;
; CHECK-F32FTZ-EMPTY:
; CHECK-F32FTZ-NEXT: // %bb.0:
; CHECK-F32FTZ-NEXT: ld.param.b16 %rs1, [test_sub_f32_f16_2_param_0];
; CHECK-F32FTZ-NEXT: cvt.ftz.f32.f16 %r1, %rs1;
; CHECK-F32FTZ-NEXT: ld.param.b32 %r2, [test_sub_f32_f16_2_param_1];
; CHECK-F32FTZ-NEXT: sub.rn.ftz.f32 %r3, %r1, %r2;
; CHECK-F32FTZ-NEXT: st.param.b32 [func_retval0], %r3;
; CHECK-F32FTZ-NEXT: ret;
%r0 = fpext half %a to float
%r1 = fsub float %r0, %b
ret float %r1
}
define float @test_sub_f32_bf16_1(bfloat %a, float %b) {
; CHECK-LABEL: test_sub_f32_bf16_1(
; CHECK: {
; CHECK-NEXT: .reg .b16 %rs<2>;
; CHECK-NEXT: .reg .b32 %r<10>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b16 %rs1, [test_sub_f32_bf16_1_param_0];
; CHECK-NEXT: ld.param.b32 %r1, [test_sub_f32_bf16_1_param_1];
; CHECK-NEXT: sub.rn.f32.bf16 %r2, %rs1, %r1;
; CHECK-NEXT: sub.rz.f32.bf16 %r3, %rs1, %r2;
; CHECK-NEXT: sub.rm.f32.bf16 %r4, %rs1, %r3;
; CHECK-NEXT: sub.rp.f32.bf16 %r5, %rs1, %r4;
; CHECK-NEXT: sub.rn.sat.f32.bf16 %r6, %rs1, %r5;
; CHECK-NEXT: sub.rz.sat.f32.bf16 %r7, %rs1, %r6;
; CHECK-NEXT: sub.rm.sat.f32.bf16 %r8, %rs1, %r7;
; CHECK-NEXT: sub.rp.sat.f32.bf16 %r9, %rs1, %r8;
; CHECK-NEXT: st.param.b32 [func_retval0], %r9;
; CHECK-NEXT: ret;
%r0 = fpext bfloat %a to float
%f0 = fneg float %b
%r1 = call float @llvm.nvvm.add.rn.f(float %r0, float %f0)
%f1 = fneg float %r1
%r2 = call float @llvm.nvvm.add.rz.f(float %r0, float %f1)
%f2 = fneg float %r2
%r3 = call float @llvm.nvvm.add.rm.f(float %r0, float %f2)
%f3 = fneg float %r3
%r4 = call float @llvm.nvvm.add.rp.f(float %r0, float %f3)
; SAT
%f4 = fneg float %r4
%r5 = call float @llvm.nvvm.add.rn.sat.f(float %r0, float %f4)
%f5 = fneg float %r5
%r6 = call float @llvm.nvvm.add.rz.sat.f(float %r0, float %f5)
%f6 = fneg float %r6
%r7 = call float @llvm.nvvm.add.rm.sat.f(float %r0, float %f6)
%f7 = fneg float %r7
%r8 = call float @llvm.nvvm.add.rp.sat.f(float %r0, float %f7)
ret float %r8
}
define float @test_sub_f32_bf16_2(bfloat %a, float %b) {
; CHECK-NOF32FTZ-LABEL: test_sub_f32_bf16_2(
; CHECK-NOF32FTZ: {
; CHECK-NOF32FTZ-NEXT: .reg .b16 %rs<2>;
; CHECK-NOF32FTZ-NEXT: .reg .b32 %r<3>;
; CHECK-NOF32FTZ-EMPTY:
; CHECK-NOF32FTZ-NEXT: // %bb.0:
; CHECK-NOF32FTZ-NEXT: ld.param.b16 %rs1, [test_sub_f32_bf16_2_param_0];
; CHECK-NOF32FTZ-NEXT: ld.param.b32 %r1, [test_sub_f32_bf16_2_param_1];
; CHECK-NOF32FTZ-NEXT: sub.rn.f32.bf16 %r2, %rs1, %r1;
; CHECK-NOF32FTZ-NEXT: st.param.b32 [func_retval0], %r2;
; CHECK-NOF32FTZ-NEXT: ret;
;
; CHECK-F32FTZ-LABEL: test_sub_f32_bf16_2(
; CHECK-F32FTZ: {
; CHECK-F32FTZ-NEXT: .reg .b16 %rs<2>;
; CHECK-F32FTZ-NEXT: .reg .b32 %r<4>;
; CHECK-F32FTZ-EMPTY:
; CHECK-F32FTZ-NEXT: // %bb.0:
; CHECK-F32FTZ-NEXT: ld.param.b16 %rs1, [test_sub_f32_bf16_2_param_0];
; CHECK-F32FTZ-NEXT: cvt.ftz.f32.bf16 %r1, %rs1;
; CHECK-F32FTZ-NEXT: ld.param.b32 %r2, [test_sub_f32_bf16_2_param_1];
; CHECK-F32FTZ-NEXT: sub.rn.ftz.f32 %r3, %r1, %r2;
; CHECK-F32FTZ-NEXT: st.param.b32 [func_retval0], %r3;
; CHECK-F32FTZ-NEXT: ret;
%r0 = fpext bfloat %a to float
%r1 = fsub float %r0, %b
ret float %r1
}
; FMA
define float @test_fma_f32_f16_1(half %a, half %b, float %c) {
; CHECK-LABEL: test_fma_f32_f16_1(
; CHECK: {
; CHECK-NEXT: .reg .b16 %rs<3>;
; CHECK-NEXT: .reg .b32 %r<9>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b16 %rs1, [test_fma_f32_f16_1_param_0];
; CHECK-NEXT: ld.param.b16 %rs2, [test_fma_f32_f16_1_param_1];
; CHECK-NEXT: ld.param.b32 %r1, [test_fma_f32_f16_1_param_2];
; CHECK-NEXT: fma.rn.f32.f16 %r2, %rs1, %rs2, %r1;
; CHECK-NEXT: fma.rz.f32.f16 %r3, %rs1, %rs2, %r2;
; CHECK-NEXT: fma.rm.f32.f16 %r4, %rs1, %rs2, %r3;
; CHECK-NEXT: fma.rp.f32.f16 %r5, %rs1, %rs2, %r4;
; CHECK-NEXT: fma.rn.sat.f32.f16 %r6, %rs1, %rs2, %r5;
; CHECK-NEXT: fma.rz.sat.f32.f16 %r7, %rs1, %rs2, %r6;
; CHECK-NEXT: fma.rm.sat.f32.f16 %r8, %rs1, %rs2, %r7;
; CHECK-NEXT: st.param.b32 [func_retval0], %r8;
; CHECK-NEXT: ret;
%r0 = fpext half %a to float
%r1 = fpext half %b to float
%r2 = call float @llvm.nvvm.fma.rn.f(float %r0, float %r1, float %c)
%r3 = call float @llvm.nvvm.fma.rz.f(float %r0, float %r1, float %r2)
%r4 = call float @llvm.nvvm.fma.rm.f(float %r0, float %r1, float %r3)
%r5 = call float @llvm.nvvm.fma.rp.f(float %r0, float %r1, float %r4)
; SAT
%r6 = call float @llvm.nvvm.fma.rn.sat.f(float %r0, float %r1, float %r5)
%r7 = call float @llvm.nvvm.fma.rz.sat.f(float %r0, float %r1, float %r6)
%r8 = call float @llvm.nvvm.fma.rm.sat.f(float %r0, float %r1, float %r7)
%r9 = call float @llvm.nvvm.fma.rp.sat.f(float %r0, float %r1, float %r8)
ret float %r8
}
define float @test_fma_f32_f16_2(half %a, half %b, float %c) {
; CHECK-NOF32FTZ-LABEL: test_fma_f32_f16_2(
; CHECK-NOF32FTZ: {
; CHECK-NOF32FTZ-NEXT: .reg .b16 %rs<3>;
; CHECK-NOF32FTZ-NEXT: .reg .b32 %r<3>;
; CHECK-NOF32FTZ-EMPTY:
; CHECK-NOF32FTZ-NEXT: // %bb.0:
; CHECK-NOF32FTZ-NEXT: ld.param.b16 %rs1, [test_fma_f32_f16_2_param_0];
; CHECK-NOF32FTZ-NEXT: ld.param.b16 %rs2, [test_fma_f32_f16_2_param_1];
; CHECK-NOF32FTZ-NEXT: ld.param.b32 %r1, [test_fma_f32_f16_2_param_2];
; CHECK-NOF32FTZ-NEXT: fma.rn.f32.f16 %r2, %rs1, %rs2, %r1;
; CHECK-NOF32FTZ-NEXT: st.param.b32 [func_retval0], %r2;
; CHECK-NOF32FTZ-NEXT: ret;
;
; CHECK-F32FTZ-LABEL: test_fma_f32_f16_2(
; CHECK-F32FTZ: {
; CHECK-F32FTZ-NEXT: .reg .b16 %rs<3>;
; CHECK-F32FTZ-NEXT: .reg .b32 %r<5>;
; CHECK-F32FTZ-EMPTY:
; CHECK-F32FTZ-NEXT: // %bb.0:
; CHECK-F32FTZ-NEXT: ld.param.b16 %rs1, [test_fma_f32_f16_2_param_0];
; CHECK-F32FTZ-NEXT: cvt.ftz.f32.f16 %r1, %rs1;
; CHECK-F32FTZ-NEXT: ld.param.b16 %rs2, [test_fma_f32_f16_2_param_1];
; CHECK-F32FTZ-NEXT: cvt.ftz.f32.f16 %r2, %rs2;
; CHECK-F32FTZ-NEXT: ld.param.b32 %r3, [test_fma_f32_f16_2_param_2];
; CHECK-F32FTZ-NEXT: fma.rn.ftz.f32 %r4, %r1, %r2, %r3;
; CHECK-F32FTZ-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-F32FTZ-NEXT: ret;
%r0 = fpext half %a to float
%r1 = fpext half %b to float
%r2 = call float @llvm.fma.f32(float %r0, float %r1, float %c)
ret float %r2
}
define float @test_fma_f32_bf16_1(bfloat %a, bfloat %b, float %c) {
; CHECK-LABEL: test_fma_f32_bf16_1(
; CHECK: {
; CHECK-NEXT: .reg .b16 %rs<3>;
; CHECK-NEXT: .reg .b32 %r<9>;
; CHECK-EMPTY:
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: ld.param.b16 %rs1, [test_fma_f32_bf16_1_param_0];
; CHECK-NEXT: ld.param.b16 %rs2, [test_fma_f32_bf16_1_param_1];
; CHECK-NEXT: ld.param.b32 %r1, [test_fma_f32_bf16_1_param_2];
; CHECK-NEXT: fma.rn.f32.bf16 %r2, %rs1, %rs2, %r1;
; CHECK-NEXT: fma.rz.f32.bf16 %r3, %rs1, %rs2, %r2;
; CHECK-NEXT: fma.rm.f32.bf16 %r4, %rs1, %rs2, %r3;
; CHECK-NEXT: fma.rp.f32.bf16 %r5, %rs1, %rs2, %r4;
; CHECK-NEXT: fma.rn.sat.f32.bf16 %r6, %rs1, %rs2, %r5;
; CHECK-NEXT: fma.rz.sat.f32.bf16 %r7, %rs1, %rs2, %r6;
; CHECK-NEXT: fma.rm.sat.f32.bf16 %r8, %rs1, %rs2, %r7;
; CHECK-NEXT: st.param.b32 [func_retval0], %r8;
; CHECK-NEXT: ret;
%r0 = fpext bfloat %a to float
%r1 = fpext bfloat %b to float
%r2 = call float @llvm.nvvm.fma.rn.f(float %r0, float %r1, float %c)
%r3 = call float @llvm.nvvm.fma.rz.f(float %r0, float %r1, float %r2)
%r4 = call float @llvm.nvvm.fma.rm.f(float %r0, float %r1, float %r3)
%r5 = call float @llvm.nvvm.fma.rp.f(float %r0, float %r1, float %r4)
; SAT
%r6 = call float @llvm.nvvm.fma.rn.sat.f(float %r0, float %r1, float %r5)
%r7 = call float @llvm.nvvm.fma.rz.sat.f(float %r0, float %r1, float %r6)
%r8 = call float @llvm.nvvm.fma.rm.sat.f(float %r0, float %r1, float %r7)
%r9 = call float @llvm.nvvm.fma.rp.sat.f(float %r0, float %r1, float %r8)
ret float %r8
}
define float @test_fma_f32_bf16_2(bfloat %a, bfloat %b, float %c) {
; CHECK-NOF32FTZ-LABEL: test_fma_f32_bf16_2(
; CHECK-NOF32FTZ: {
; CHECK-NOF32FTZ-NEXT: .reg .b16 %rs<3>;
; CHECK-NOF32FTZ-NEXT: .reg .b32 %r<3>;
; CHECK-NOF32FTZ-EMPTY:
; CHECK-NOF32FTZ-NEXT: // %bb.0:
; CHECK-NOF32FTZ-NEXT: ld.param.b16 %rs1, [test_fma_f32_bf16_2_param_0];
; CHECK-NOF32FTZ-NEXT: ld.param.b16 %rs2, [test_fma_f32_bf16_2_param_1];
; CHECK-NOF32FTZ-NEXT: ld.param.b32 %r1, [test_fma_f32_bf16_2_param_2];
; CHECK-NOF32FTZ-NEXT: fma.rn.f32.bf16 %r2, %rs1, %rs2, %r1;
; CHECK-NOF32FTZ-NEXT: st.param.b32 [func_retval0], %r2;
; CHECK-NOF32FTZ-NEXT: ret;
;
; CHECK-F32FTZ-LABEL: test_fma_f32_bf16_2(
; CHECK-F32FTZ: {
; CHECK-F32FTZ-NEXT: .reg .b16 %rs<3>;
; CHECK-F32FTZ-NEXT: .reg .b32 %r<5>;
; CHECK-F32FTZ-EMPTY:
; CHECK-F32FTZ-NEXT: // %bb.0:
; CHECK-F32FTZ-NEXT: ld.param.b16 %rs1, [test_fma_f32_bf16_2_param_0];
; CHECK-F32FTZ-NEXT: cvt.ftz.f32.bf16 %r1, %rs1;
; CHECK-F32FTZ-NEXT: ld.param.b16 %rs2, [test_fma_f32_bf16_2_param_1];
; CHECK-F32FTZ-NEXT: cvt.ftz.f32.bf16 %r2, %rs2;
; CHECK-F32FTZ-NEXT: ld.param.b32 %r3, [test_fma_f32_bf16_2_param_2];
; CHECK-F32FTZ-NEXT: fma.rn.ftz.f32 %r4, %r1, %r2, %r3;
; CHECK-F32FTZ-NEXT: st.param.b32 [func_retval0], %r4;
; CHECK-F32FTZ-NEXT: ret;
%r0 = fpext bfloat %a to float
%r1 = fpext bfloat %b to float
%r2 = call float @llvm.fma.f32(float %r0, float %r1, float %c)
ret float %r2
}
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