derek.holloway
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52 lines
1.8 KiB
LLVM
52 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_30 -verify-machineinstrs | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -verify-machineinstrs | %ptxas-verify %}
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_30 -verify-machineinstrs | %ptxas-verify %}
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target triple = "nvptx-unknown-cuda"
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declare void @llvm.nvvm.sust.b.1d.i32.trap(i64, i32, i32)
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declare i64 @llvm.nvvm.texsurf.handle.internal.p1(ptr addrspace(1))
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define ptx_kernel void @foo(i64 %img, i32 %val, i32 %idx) {
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; CHECK-LABEL: foo(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<3>;
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b64 %rd1, [foo_param_0];
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; CHECK-NEXT: ld.param.b32 %r1, [foo_param_1];
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; CHECK-NEXT: ld.param.b32 %r2, [foo_param_2];
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; CHECK-NEXT: sust.b.1d.b32.trap [%rd1, {%r2}], {%r1};
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; CHECK-NEXT: ret;
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tail call void @llvm.nvvm.sust.b.1d.i32.trap(i64 %img, i32 %idx, i32 %val)
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ret void
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}
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@surf0 = internal addrspace(1) global i64 0, align 8
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define ptx_kernel void @bar(i32 %val, i32 %idx) {
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; CHECK-LABEL: bar(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<3>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [bar_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [bar_param_1];
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; CHECK-NEXT: sust.b.1d.b32.trap [surf0, {%r2}], {%r1};
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; CHECK-NEXT: ret;
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%surfHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1(ptr addrspace(1) @surf0)
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tail call void @llvm.nvvm.sust.b.1d.i32.trap(i64 %surfHandle, i32 %idx, i32 %val)
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ret void
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}
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!nvvm.annotations = !{!1}
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!1 = !{ptr addrspace(1) @surf0, !"surface", i32 1}
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