derek.holloway
7502bf64a4
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64 lines
2.3 KiB
LLVM
64 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -verify-machineinstrs -mattr=-isel | FileCheck --check-prefix=CHECK-NO-ISEL %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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define i32 @test(i32 %a, i32 %b, i32 %c, i32 %d) {
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; CHECK-LABEL: test:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: slwi 5, 6, 16
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; CHECK-NEXT: extsh 6, 6
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; CHECK-NEXT: cmpwi 5, -1
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; CHECK-NEXT: add 5, 6, 3
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; CHECK-NEXT: clrlwi 6, 6, 17
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; CHECK-NEXT: sub 6, 3, 6
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; CHECK-NEXT: sub 3, 4, 3
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; CHECK-NEXT: iselgt 5, 5, 6
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; CHECK-NEXT: extsh 5, 5
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; CHECK-NEXT: add 3, 3, 5
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; CHECK-NEXT: blr
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;
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; CHECK-NO-ISEL-LABEL: test:
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; CHECK-NO-ISEL: # %bb.0: # %entry
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; CHECK-NO-ISEL-NEXT: slwi 7, 6, 16
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; CHECK-NO-ISEL-NEXT: extsh 5, 6
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; CHECK-NO-ISEL-NEXT: cmpwi 7, -1
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; CHECK-NO-ISEL-NEXT: ble 0, .LBB0_2
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; CHECK-NO-ISEL-NEXT: # %bb.1: # %cond.false
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; CHECK-NO-ISEL-NEXT: add 5, 5, 3
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; CHECK-NO-ISEL-NEXT: b .LBB0_3
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; CHECK-NO-ISEL-NEXT: .LBB0_2: # %cond.true
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; CHECK-NO-ISEL-NEXT: clrlwi 5, 5, 17
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; CHECK-NO-ISEL-NEXT: sub 5, 3, 5
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; CHECK-NO-ISEL-NEXT: .LBB0_3: # %cond.end
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; CHECK-NO-ISEL-NEXT: extsh 5, 5
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; CHECK-NO-ISEL-NEXT: sub 3, 4, 3
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; CHECK-NO-ISEL-NEXT: add 3, 3, 5
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; CHECK-NO-ISEL-NEXT: blr
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entry:
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%sext82 = shl i32 %d, 16
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%conv29 = ashr exact i32 %sext82, 16
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%cmp = icmp slt i32 %sext82, 0
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br i1 %cmp, label %cond.true, label %cond.false
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cond.true: ; preds = %sw.epilog
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%and33 = and i32 %conv29, 32767
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%sub34 = sub nsw i32 %a, %and33
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br label %cond.end
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cond.false: ; preds = %sw.epilog
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%add37 = add nsw i32 %conv29, %a
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br label %cond.end
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cond.end: ; preds = %cond.false, %cond.true
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%cond = phi i32 [ %sub34, %cond.true ], [ %add37, %cond.false ]
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%sext83 = shl i32 %cond, 16
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%conv39 = ashr exact i32 %sext83, 16
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%add41 = sub i32 %b, %a
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%sub43 = add i32 %add41, %conv39
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ret i32 %sub43
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}
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