derek.holloway
7502bf64a4
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55 lines
1.5 KiB
LLVM
55 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64-- -mcpu=pwr5 -verify-machineinstrs < %s | \
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; RUN: FileCheck %s
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define void @bs(ptr %p) {
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; CHECK-LABEL: bs:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li 4, 4
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; CHECK-NEXT: lwbrx 5, 0, 3
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; CHECK-NEXT: lwbrx 4, 3, 4
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; CHECK-NEXT: rldimi 5, 4, 32, 0
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; CHECK-NEXT: std 5, 0(3)
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; CHECK-NEXT: blr
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%x = load i64, ptr %p, align 8
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%b = call i64 @llvm.bswap.i64(i64 %x)
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store i64 %b, ptr %p, align 8
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ret void
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}
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define i64 @volatile_ld(ptr %p) {
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; CHECK-LABEL: volatile_ld:
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; CHECK: # %bb.0:
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; CHECK-NEXT: ld 4, 0(3)
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; CHECK-NEXT: rotldi 5, 4, 16
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; CHECK-NEXT: rotldi 3, 4, 8
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; CHECK-NEXT: rldimi 3, 5, 8, 48
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; CHECK-NEXT: rotldi 5, 4, 24
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; CHECK-NEXT: rldimi 3, 5, 16, 40
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; CHECK-NEXT: rotldi 5, 4, 32
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; CHECK-NEXT: rldimi 3, 5, 24, 32
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; CHECK-NEXT: rotldi 5, 4, 48
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; CHECK-NEXT: rldimi 3, 5, 40, 16
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; CHECK-NEXT: rotldi 5, 4, 56
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; CHECK-NEXT: rldimi 3, 5, 48, 8
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; CHECK-NEXT: rldimi 3, 4, 56, 0
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; CHECK-NEXT: blr
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%x = load volatile i64, ptr %p, align 8
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%b = call i64 @llvm.bswap.i64(i64 %x)
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ret i64 %b
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}
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define i64 @misaligned_ld(ptr %p) {
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; CHECK-LABEL: misaligned_ld:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li 4, 4
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; CHECK-NEXT: lwbrx 4, 3, 4
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; CHECK-NEXT: lwbrx 3, 0, 3
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; CHECK-NEXT: rldimi 3, 4, 32, 0
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; CHECK-NEXT: blr
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%x = load i64, ptr %p, align 1
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%b = call i64 @llvm.bswap.i64(i64 %x)
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ret i64 %b
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}
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declare i64 @llvm.bswap.i64(i64) #2
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