derek.holloway
7502bf64a4
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47 lines
1.3 KiB
LLVM
47 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -simplify-mir -verify-machineinstrs < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-grtev4-linux-gnu"
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define void @foo(ptr %p1, i64 %v1, i8 %v2, i64 %v3) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li 7, 0
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; CHECK-NEXT: std 7, 0(3)
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; CHECK-NEXT: mr 7, 5
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; CHECK-NEXT: rldimi. 7, 4, 8, 0
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; CHECK-NEXT: crnot 20, 2
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; CHECK-NEXT: andi. 5, 5, 1
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; CHECK-NEXT: bc 4, 1, .LBB0_2
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; CHECK-NEXT: # %bb.1: # %bb1
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; CHECK-NEXT: std 4, 0(3)
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; CHECK-NEXT: .LBB0_2: # %bb2
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; CHECK-NEXT: bclr 12, 20, 0
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; CHECK-NEXT: # %bb.3: # %bb3
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; CHECK-NEXT: std 6, 0(3)
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; CHECK-NEXT: blr
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store i64 0, ptr %p1, align 8
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%ext = zext i8 %v2 to i64
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%shift = shl nuw i64 %v1, 8
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%merge = or i64 %shift, %ext
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%not0 = icmp ne i64 %merge, 0
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%bit0 = and i64 %ext, 1 ; and & icmp instructions can be combined
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%cond1 = icmp eq i64 %bit0, 0 ; to and. and generates condition code to
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br i1 %cond1, label %bb2, label %bb1 ; be used by this conditional branch
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bb1:
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store i64 %v1, ptr %p1, align 8
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br label %bb2
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bb2:
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br i1 %not0, label %exit, label %bb3
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bb3:
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store i64 %v3, ptr %p1, align 8
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br label %exit
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exit:
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ret void
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}
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