derek.holloway
7502bf64a4
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120 lines
3.6 KiB
LLVM
120 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mattr=+vsx -mcpu=pwr8 < %s | \
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; RUN: FileCheck %s --implicit-check-not lxvd2x --implicit-check-not lfs
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -mattr=-altivec -mcpu=pwr8 -mattr=-vsx < %s | \
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; RUN: FileCheck %s --check-prefix=CHECK-NVSXALT --implicit-check-not xxlxor \
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; RUN: --implicit-check-not vxor
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define signext i32 @t1(float %x) local_unnamed_addr #0 {
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; CHECK-LABEL: t1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxlxor 0, 0, 0
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; CHECK-NEXT: li 3, 11
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; CHECK-NEXT: li 4, 43
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; CHECK-NEXT: fcmpu 0, 1, 0
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; CHECK-NEXT: iselgt 3, 4, 3
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; CHECK-NEXT: blr
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;
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; CHECK-NVSXALT-LABEL: t1:
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; CHECK-NVSXALT: # %bb.0: # %entry
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; CHECK-NVSXALT-NEXT: addis 3, 2, .LCPI0_0@toc@ha
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; CHECK-NVSXALT-NEXT: li 4, 43
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; CHECK-NVSXALT-NEXT: lfs 0, .LCPI0_0@toc@l(3)
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; CHECK-NVSXALT-NEXT: li 3, 11
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; CHECK-NVSXALT-NEXT: fcmpu 0, 1, 0
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; CHECK-NVSXALT-NEXT: iselgt 3, 4, 3
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; CHECK-NVSXALT-NEXT: blr
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entry:
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%cmp = fcmp ogt float %x, 0.000000e+00
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%tmp = select i1 %cmp, i32 43, i32 11
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ret i32 %tmp
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}
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define signext i32 @t2(double %x) local_unnamed_addr #0 {
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; CHECK-LABEL: t2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxlxor 0, 0, 0
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; CHECK-NEXT: li 3, 11
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; CHECK-NEXT: li 4, 43
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; CHECK-NEXT: xscmpudp 0, 1, 0
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; CHECK-NEXT: iselgt 3, 4, 3
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; CHECK-NEXT: blr
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;
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; CHECK-NVSXALT-LABEL: t2:
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; CHECK-NVSXALT: # %bb.0: # %entry
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; CHECK-NVSXALT-NEXT: addis 3, 2, .LCPI1_0@toc@ha
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; CHECK-NVSXALT-NEXT: li 4, 43
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; CHECK-NVSXALT-NEXT: lfs 0, .LCPI1_0@toc@l(3)
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; CHECK-NVSXALT-NEXT: li 3, 11
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; CHECK-NVSXALT-NEXT: fcmpu 0, 1, 0
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; CHECK-NVSXALT-NEXT: iselgt 3, 4, 3
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; CHECK-NVSXALT-NEXT: blr
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entry:
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%cmp = fcmp ogt double %x, 0.000000e+00
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%tmp = select i1 %cmp, i32 43, i32 11
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ret i32 %tmp
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}
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define signext i32 @t3(ppc_fp128 %x) local_unnamed_addr #0 {
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; CHECK-LABEL: t3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: xxlxor 0, 0, 0
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; CHECK-NEXT: li 3, 11
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; CHECK-NEXT: li 4, 43
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; CHECK-NEXT: fcmpu 0, 2, 0
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; CHECK-NEXT: fcmpu 1, 1, 0
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; CHECK-NEXT: crand 20, 6, 1
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; CHECK-NEXT: cror 20, 5, 20
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; CHECK-NEXT: isel 3, 4, 3, 20
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; CHECK-NEXT: blr
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;
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; CHECK-NVSXALT-LABEL: t3:
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; CHECK-NVSXALT: # %bb.0: # %entry
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; CHECK-NVSXALT-NEXT: addis 3, 2, .LCPI2_0@toc@ha
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; CHECK-NVSXALT-NEXT: li 4, 43
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; CHECK-NVSXALT-NEXT: lfs 0, .LCPI2_0@toc@l(3)
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; CHECK-NVSXALT-NEXT: li 3, 11
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; CHECK-NVSXALT-NEXT: fcmpu 0, 2, 0
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; CHECK-NVSXALT-NEXT: fcmpu 1, 1, 0
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; CHECK-NVSXALT-NEXT: crand 20, 6, 1
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; CHECK-NVSXALT-NEXT: cror 20, 5, 20
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; CHECK-NVSXALT-NEXT: isel 3, 4, 3, 20
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; CHECK-NVSXALT-NEXT: blr
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entry:
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%cmp = fcmp ogt ppc_fp128 %x, 0xM00000000000000000000000000000000
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%tmp = select i1 %cmp, i32 43, i32 11
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ret i32 %tmp
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}
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define <2 x double> @t4() local_unnamed_addr #0 {
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; CHECK-LABEL: t4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xxlxor 34, 34, 34
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; CHECK-NEXT: blr
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;
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; CHECK-NVSXALT-LABEL: t4:
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; CHECK-NVSXALT: # %bb.0:
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; CHECK-NVSXALT-NEXT: addis 3, 2, .LCPI3_0@toc@ha
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; CHECK-NVSXALT-NEXT: lfs 1, .LCPI3_0@toc@l(3)
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; CHECK-NVSXALT-NEXT: fmr 2, 1
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; CHECK-NVSXALT-NEXT: blr
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ret <2 x double> zeroinitializer
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}
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define <2 x i64> @t5() local_unnamed_addr #0 {
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; CHECK-LABEL: t5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: xxlxor 34, 34, 34
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; CHECK-NEXT: blr
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;
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; CHECK-NVSXALT-LABEL: t5:
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; CHECK-NVSXALT: # %bb.0:
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; CHECK-NVSXALT-NEXT: li 3, 0
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; CHECK-NVSXALT-NEXT: li 4, 0
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; CHECK-NVSXALT-NEXT: blr
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ret <2 x i64> zeroinitializer
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}
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