derek.holloway
7502bf64a4
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163 lines
5.0 KiB
LLVM
163 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 < %s | FileCheck %s --check-prefix=CHECK-P9
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; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 < %s | FileCheck %s --check-prefix=CHECK-P8
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; Basic comparison with branch
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define i32 @test_br_cc_olt(half %a, half %b) nounwind {
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; CHECK-P9-LABEL: test_br_cc_olt:
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; CHECK-P9: # %bb.0:
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; CHECK-P9-NEXT: clrlwi 3, 3, 16
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; CHECK-P9-NEXT: clrlwi 4, 4, 16
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; CHECK-P9-NEXT: mtfprwz 0, 4
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; CHECK-P9-NEXT: mtfprwz 1, 3
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; CHECK-P9-NEXT: xscvhpdp 0, 0
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; CHECK-P9-NEXT: xscvhpdp 1, 1
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; CHECK-P9-NEXT: fcmpu 0, 1, 0
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; CHECK-P9-NEXT: bge 0, .LBB0_2
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; CHECK-P9-NEXT: # %bb.1: # %if.then
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; CHECK-P9-NEXT: li 3, 1
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; CHECK-P9-NEXT: blr
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; CHECK-P9-NEXT: .LBB0_2: # %if.else
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; CHECK-P9-NEXT: li 3, 0
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; CHECK-P9-NEXT: blr
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;
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; CHECK-P8-LABEL: test_br_cc_olt:
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; CHECK-P8: # %bb.0:
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; CHECK-P8-NEXT: mflr 0
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; CHECK-P8-NEXT: std 30, -24(1) # 8-byte Folded Spill
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; CHECK-P8-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
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; CHECK-P8-NEXT: stdu 1, -64(1)
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; CHECK-P8-NEXT: mr 30, 3
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; CHECK-P8-NEXT: clrldi 3, 4, 48
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; CHECK-P8-NEXT: std 0, 80(1)
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; CHECK-P8-NEXT: bl __extendhfsf2
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; CHECK-P8-NEXT: nop
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; CHECK-P8-NEXT: clrldi 3, 30, 48
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; CHECK-P8-NEXT: fmr 31, 1
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; CHECK-P8-NEXT: bl __extendhfsf2
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; CHECK-P8-NEXT: nop
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; CHECK-P8-NEXT: fcmpu 0, 1, 31
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; CHECK-P8-NEXT: bge 0, .LBB0_2
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; CHECK-P8-NEXT: # %bb.1: # %if.then
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; CHECK-P8-NEXT: li 3, 1
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; CHECK-P8-NEXT: b .LBB0_3
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; CHECK-P8-NEXT: .LBB0_2: # %if.else
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; CHECK-P8-NEXT: li 3, 0
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; CHECK-P8-NEXT: .LBB0_3: # %if.then
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; CHECK-P8-NEXT: addi 1, 1, 64
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; CHECK-P8-NEXT: ld 0, 16(1)
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; CHECK-P8-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
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; CHECK-P8-NEXT: ld 30, -24(1) # 8-byte Folded Reload
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; CHECK-P8-NEXT: mtlr 0
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; CHECK-P8-NEXT: blr
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%cmp = fcmp olt half %a, %b
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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ret i32 1
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if.else:
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ret i32 0
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}
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; Test with constant
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define i32 @test_br_cc_constant(half %a) nounwind {
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; CHECK-P9-LABEL: test_br_cc_constant:
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; CHECK-P9: # %bb.0:
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; CHECK-P9-NEXT: clrlwi 3, 3, 16
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; CHECK-P9-NEXT: xxlxor 1, 1, 1
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; CHECK-P9-NEXT: mtfprwz 0, 3
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; CHECK-P9-NEXT: xscvhpdp 0, 0
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; CHECK-P9-NEXT: fcmpu 0, 0, 1
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; CHECK-P9-NEXT: ble 0, .LBB1_2
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; CHECK-P9-NEXT: # %bb.1: # %if.then
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; CHECK-P9-NEXT: li 3, 1
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; CHECK-P9-NEXT: blr
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; CHECK-P9-NEXT: .LBB1_2: # %if.else
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; CHECK-P9-NEXT: li 3, 0
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; CHECK-P9-NEXT: blr
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;
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; CHECK-P8-LABEL: test_br_cc_constant:
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; CHECK-P8: # %bb.0:
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; CHECK-P8-NEXT: mflr 0
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; CHECK-P8-NEXT: stdu 1, -32(1)
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; CHECK-P8-NEXT: clrldi 3, 3, 48
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; CHECK-P8-NEXT: std 0, 48(1)
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; CHECK-P8-NEXT: bl __extendhfsf2
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; CHECK-P8-NEXT: nop
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; CHECK-P8-NEXT: xxlxor 0, 0, 0
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; CHECK-P8-NEXT: fcmpu 0, 1, 0
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; CHECK-P8-NEXT: ble 0, .LBB1_2
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; CHECK-P8-NEXT: # %bb.1: # %if.then
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; CHECK-P8-NEXT: li 3, 1
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; CHECK-P8-NEXT: b .LBB1_3
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; CHECK-P8-NEXT: .LBB1_2: # %if.else
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; CHECK-P8-NEXT: li 3, 0
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; CHECK-P8-NEXT: .LBB1_3: # %if.then
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; CHECK-P8-NEXT: addi 1, 1, 32
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; CHECK-P8-NEXT: ld 0, 16(1)
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; CHECK-P8-NEXT: mtlr 0
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; CHECK-P8-NEXT: blr
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%cmp = fcmp ogt half %a, 0xH0000
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br i1 %cmp, label %if.then, label %if.else
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if.then:
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ret i32 1
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if.else:
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ret i32 0
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}
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; vector reduction + branch
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define fastcc i16 @test_vector_reduce_br(half %arg) nounwind {
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; CHECK-P9-LABEL: test_vector_reduce_br:
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; CHECK-P9: # %bb.0:
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; CHECK-P9-NEXT: clrlwi 3, 3, 16
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; CHECK-P9-NEXT: xxlxor 1, 1, 1
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; CHECK-P9-NEXT: mtfprwz 0, 3
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; CHECK-P9-NEXT: xscvhpdp 0, 0
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; CHECK-P9-NEXT: fcmpu 0, 0, 1
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; CHECK-P9-NEXT: bc 12, 0, .LBB2_3
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; CHECK-P9-NEXT: # %bb.1:
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; CHECK-P9-NEXT: fcmpu 0, 0, 0
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; CHECK-P9-NEXT: bc 12, 3, .LBB2_3
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; CHECK-P9-NEXT: # %bb.2: # %taken
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; CHECK-P9-NEXT: li 3, 0
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; CHECK-P9-NEXT: blr
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; CHECK-P9-NEXT: .LBB2_3: # %not_taken
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; CHECK-P9-NEXT: li 3, 1
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; CHECK-P9-NEXT: blr
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;
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; CHECK-P8-LABEL: test_vector_reduce_br:
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; CHECK-P8: # %bb.0:
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; CHECK-P8-NEXT: mflr 0
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; CHECK-P8-NEXT: stdu 1, -32(1)
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; CHECK-P8-NEXT: clrldi 3, 3, 48
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; CHECK-P8-NEXT: std 0, 48(1)
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; CHECK-P8-NEXT: bl __extendhfsf2
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; CHECK-P8-NEXT: nop
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; CHECK-P8-NEXT: xxlxor 0, 0, 0
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; CHECK-P8-NEXT: fcmpu 0, 1, 0
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; CHECK-P8-NEXT: bc 12, 0, .LBB2_3
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; CHECK-P8-NEXT: # %bb.1:
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; CHECK-P8-NEXT: fcmpu 0, 1, 1
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; CHECK-P8-NEXT: bc 12, 3, .LBB2_3
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; CHECK-P8-NEXT: # %bb.2: # %taken
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; CHECK-P8-NEXT: li 3, 0
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; CHECK-P8-NEXT: b .LBB2_4
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; CHECK-P8-NEXT: .LBB2_3: # %not_taken
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; CHECK-P8-NEXT: li 3, 1
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; CHECK-P8-NEXT: .LBB2_4: # %taken
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; CHECK-P8-NEXT: addi 1, 1, 32
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; CHECK-P8-NEXT: ld 0, 16(1)
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; CHECK-P8-NEXT: mtlr 0
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; CHECK-P8-NEXT: blr
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%reduce = tail call half @llvm.vector.reduce.fmin.v4f16(<4 x half> zeroinitializer)
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%cmp = fcmp ole half %reduce, %arg
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br i1 %cmp, label %taken, label %not_taken
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taken:
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ret i16 0
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not_taken:
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ret i16 1
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}
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declare half @llvm.vector.reduce.fmin.v4f16(<4 x half>)
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