derek.holloway
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57 lines
2.2 KiB
LLVM
57 lines
2.2 KiB
LLVM
; NOTE: This test case aims to test the sequence of spilling the CR[0-7]LT bits
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; NOTE: on POWER9 using the setb instruction.
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr9 < %s \
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; RUN: | FileCheck %s --check-prefix=CHECK-P9
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr9 < %s \
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; RUN: | FileCheck %s --check-prefix=CHECK-P9
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr8 < %s \
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; RUN: | FileCheck %s --check-prefix=CHECK-P8
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr -mcpu=pwr8 < %s \
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; RUN: | FileCheck %s --check-prefix=CHECK-P8
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define void @p9_setb_spill() {
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; CHECK-P9-LABEL: p9_setb_spill:
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; CHECK-P9: # %bb.1: # %if.then
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; CHECK-P9-DAG: crnot 4*cr[[CREG:.*]]+lt, eq
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; CHECK-P9-DAG: setb [[REG1:.*]], cr[[CREG]]
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; CHECK-P9-DAG: stw [[REG1]]
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; CHECK-P9: blr
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; CHECK-P9: .LBB0_4: # %if.then1
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;
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; CHECK-P8-LABEL: p9_setb_spill:
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; CHECK-P8: # %bb.1: # %if.then
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; CHECK-P8-DAG: crnot 4*cr[[CREG2:.*]]+lt, eq
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; CHECK-P8-DAG: mfocrf [[REG2:.*]],
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; CHECK-P8-DAG: rlwinm [[REG2]], [[REG2]]
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; CHECK-P8-DAG: stw [[REG2]]
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; CHECK-P8: blr
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; CHECK-P8: .LBB0_4: # %if.then1
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entry:
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br i1 undef, label %if.end, label %if.then
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if.then: ; preds = %entry
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%call = tail call signext i32 @fn_call()
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%cmp1 = icmp ne i32 %call, 0
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br label %if.end
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if.end: ; preds = %if.then, %entry
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%off0 = phi i1 [ %cmp1, %if.then ], [ false, %entry ]
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tail call void asm sideeffect "#Clobber", "~{cr0},~{cr1},~{cr2},~{cr3},~{cr4},~{cr5},~{cr6},~{cr7}"()
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%off0.not = xor i1 %off0, true
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%or = or i1 false, %off0.not
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br i1 %or, label %if.end2, label %if.then1
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if.then1: ; preds = %if.end
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unreachable
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if.end2: ; preds = %if.end
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ret void
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}
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declare signext i32 @fn_call(...)
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