derek.holloway
7502bf64a4
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20 lines
721 B
LLVM
20 lines
721 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le -mcpu=pwr9 < %s | FileCheck %s
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; Widen to <16 x i8>
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define <12 x i8> @zext_abdu(<12 x i8> %a, <12 x i8> %b) {
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; CHECK-LABEL: zext_abdu:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vabsdub 2, 2, 3
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; CHECK-NEXT: blr
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entry:
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%aa = zext <12 x i8> %a to <12 x i32>
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%bb = zext <12 x i8> %b to <12 x i32>
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%s = sub nsw <12 x i32> %aa, %bb
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%c = icmp slt <12 x i32> %s, zeroinitializer
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%ss = sub nsw <12 x i32> zeroinitializer, %s
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%sel = select <12 x i1> %c, <12 x i32> %ss, <12 x i32> %s
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%ret = trunc <12 x i32> %sel to <12 x i8>
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ret <12 x i8> %ret
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}
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