derek.holloway
7502bf64a4
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82 lines
2.8 KiB
LLVM
82 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel=1 -mtriple=riscv32 -mattr=+f,+d -target-abi=ilp32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s
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define fastcc float @callee([32 x float] %A) nounwind {
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; CHECK-LABEL: callee:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fmv.x.w a0, fa1
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; CHECK-NEXT: ret
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%b = extractvalue [32 x float] %A, 1
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ret float %b
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}
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; With the fastcc, arguments will be passed by fa0-fa7 and ft0-ft11.
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; The rest will be pushed on the stack.
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define float @caller([32 x float] %A) nounwind {
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; CHECK-LABEL: caller:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -80
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; CHECK-NEXT: sw ra, 76(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s0, 72(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s1, 68(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s2, 64(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s3, 60(sp) # 4-byte Folded Spill
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; CHECK-NEXT: sw s4, 56(sp) # 4-byte Folded Spill
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; CHECK-NEXT: flw ft0, 80(sp)
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; CHECK-NEXT: flw ft1, 84(sp)
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; CHECK-NEXT: flw ft2, 88(sp)
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; CHECK-NEXT: flw ft3, 92(sp)
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; CHECK-NEXT: flw ft4, 96(sp)
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; CHECK-NEXT: flw ft5, 100(sp)
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; CHECK-NEXT: flw ft6, 104(sp)
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; CHECK-NEXT: flw ft7, 108(sp)
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; CHECK-NEXT: flw ft8, 112(sp)
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; CHECK-NEXT: flw ft9, 116(sp)
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; CHECK-NEXT: flw ft10, 120(sp)
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; CHECK-NEXT: flw ft11, 124(sp)
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; CHECK-NEXT: lw t0, 128(sp)
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; CHECK-NEXT: lw t1, 132(sp)
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; CHECK-NEXT: lw t2, 136(sp)
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; CHECK-NEXT: lw t3, 140(sp)
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; CHECK-NEXT: lw t4, 144(sp)
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; CHECK-NEXT: lw t5, 148(sp)
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; CHECK-NEXT: lw t6, 152(sp)
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; CHECK-NEXT: lw s0, 156(sp)
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; CHECK-NEXT: lw s1, 160(sp)
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; CHECK-NEXT: lw s2, 164(sp)
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; CHECK-NEXT: lw s3, 168(sp)
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; CHECK-NEXT: lw s4, 172(sp)
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; CHECK-NEXT: sw t0, 0(sp)
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; CHECK-NEXT: sw t1, 4(sp)
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; CHECK-NEXT: sw t2, 8(sp)
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; CHECK-NEXT: sw t3, 12(sp)
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; CHECK-NEXT: sw t4, 16(sp)
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; CHECK-NEXT: sw t5, 20(sp)
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; CHECK-NEXT: sw t6, 24(sp)
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; CHECK-NEXT: sw s0, 28(sp)
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; CHECK-NEXT: sw s1, 32(sp)
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; CHECK-NEXT: sw s2, 36(sp)
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; CHECK-NEXT: sw s3, 40(sp)
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; CHECK-NEXT: sw s4, 44(sp)
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; CHECK-NEXT: fmv.w.x fa0, a0
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; CHECK-NEXT: fmv.w.x fa1, a1
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; CHECK-NEXT: fmv.w.x fa2, a2
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; CHECK-NEXT: fmv.w.x fa3, a3
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; CHECK-NEXT: fmv.w.x fa4, a4
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; CHECK-NEXT: fmv.w.x fa5, a5
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; CHECK-NEXT: fmv.w.x fa6, a6
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; CHECK-NEXT: fmv.w.x fa7, a7
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; CHECK-NEXT: call callee
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; CHECK-NEXT: lw ra, 76(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s0, 72(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s1, 68(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s2, 64(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s3, 60(sp) # 4-byte Folded Reload
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; CHECK-NEXT: lw s4, 56(sp) # 4-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 80
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; CHECK-NEXT: ret
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%C = call fastcc float @callee([32 x float] %A)
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ret float %C
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}
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