TheRock/compiler/amd-llvm/llvm/test/CodeGen/RISCV/machine-outliner-lpad.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple riscv64 -mattr=+experimental-zicfilp < %s | FileCheck %s
; RUN: llc -mtriple riscv32 -mattr=+experimental-zicfilp < %s | FileCheck %s

define i16 @test1(i16 %x) #0 {
; CHECK-LABEL: test1:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lpad 0
; CHECK-NEXT:    tail OUTLINED_FUNCTION_0
entry:
  %y = add i16 5, %x
  %z = mul i16 4, %y
  ret i16 %z
}

define i16 @test2(i16 %x) #0 {
; CHECK-LABEL: test2:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lpad 0
; CHECK-NEXT:    tail OUTLINED_FUNCTION_0
entry:
  %y = add i16 5, %x
  %z = mul i16 4, %y
  ret i16 %z
}

define i16 @test3(i16 %x) #0 {
; CHECK-LABEL: test3:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lpad 0
; CHECK-NEXT:    tail OUTLINED_FUNCTION_0
entry:
  %y = add i16 5, %x
  %z = mul i16 4, %y
  ret i16 %z
}

define i16 @test4(i16 %x) #0 {
; CHECK-LABEL: test4:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lpad 0
; CHECK-NEXT:    tail OUTLINED_FUNCTION_0
entry:
  %y = add i16 5, %x
  %z = mul i16 4, %y
  ret i16 %z
}

define i16 @main(i16 %x) #0 {
; CHECK-LABEL: main:
; CHECK:       # %bb.0: # %entry
; CHECK-NEXT:    lpad 0
; CHECK-NEXT:    tail OUTLINED_FUNCTION_0
entry:
  %y = add i16 5, %x
  %z = mul i16 4, %y
  ret i16 %z
}

attributes #0 = { minsize }

!llvm.module.flags = !{!0, !1}

!0 = !{i32 8, !"cf-protection-branch", i32 1}
!1 = !{i32 1, !"cf-branch-label-scheme", !"unlabeled"}