derek.holloway
7502bf64a4
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84 lines
2.9 KiB
LLVM
84 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple riscv64 < %s -o - | FileCheck %s
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%"buff" = type { [4096 x i64] }
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declare void @bar()
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define i1 @foo() nounwind "probe-stack"="inline-asm" "target-features"="+v" {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -2032
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; CHECK-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s1, 2008(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s2, 2000(sp) # 8-byte Folded Spill
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; CHECK-NEXT: sd s3, 1992(sp) # 8-byte Folded Spill
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; CHECK-NEXT: lui a0, 7
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; CHECK-NEXT: sub t1, sp, a0
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; CHECK-NEXT: lui t2, 1
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; CHECK-NEXT: .LBB0_1: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: sub sp, sp, t2
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; CHECK-NEXT: sd zero, 0(sp)
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; CHECK-NEXT: bne sp, t1, .LBB0_1
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; CHECK-NEXT: # %bb.2:
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; CHECK-NEXT: addi sp, sp, -2048
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; CHECK-NEXT: addi sp, sp, -96
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; CHECK-NEXT: csrr t1, vlenb
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; CHECK-NEXT: lui t2, 1
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; CHECK-NEXT: .LBB0_3: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: sub sp, sp, t2
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; CHECK-NEXT: sd zero, 0(sp)
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; CHECK-NEXT: sub t1, t1, t2
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; CHECK-NEXT: bge t1, t2, .LBB0_3
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; CHECK-NEXT: # %bb.4:
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; CHECK-NEXT: sub sp, sp, t1
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; CHECK-NEXT: li a0, 86
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; CHECK-NEXT: addi s0, sp, 48
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; CHECK-NEXT: addi s1, sp, 32
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; CHECK-NEXT: addi s2, sp, 16
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; CHECK-NEXT: lui a1, 353637
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; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma
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; CHECK-NEXT: vmv.v.x v8, a0
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; CHECK-NEXT: lui a0, 8
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; CHECK-NEXT: addi a0, a0, 32
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; CHECK-NEXT: add a0, sp, a0
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; CHECK-NEXT: vs1r.v v8, (a0) # vscale x 8-byte Folded Spill
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; CHECK-NEXT: addi a0, a1, 1622
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; CHECK-NEXT: vse8.v v8, (s0)
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; CHECK-NEXT: vse8.v v8, (s1)
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; CHECK-NEXT: vse8.v v8, (s2)
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; CHECK-NEXT: slli a1, a0, 32
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; CHECK-NEXT: add s3, a0, a1
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; CHECK-NEXT: sd s3, 64(sp)
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; CHECK-NEXT: call bar
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; CHECK-NEXT: lui a0, 8
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; CHECK-NEXT: addi a0, a0, 32
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; CHECK-NEXT: add a0, sp, a0
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; CHECK-NEXT: vl1r.v v8, (a0) # vscale x 8-byte Folded Reload
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; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma
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; CHECK-NEXT: vse8.v v8, (s0)
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; CHECK-NEXT: vse8.v v8, (s1)
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; CHECK-NEXT: vse8.v v8, (s2)
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; CHECK-NEXT: sd s3, 64(sp)
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; CHECK-NEXT: li a0, 0
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; CHECK-NEXT: csrr a1, vlenb
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; CHECK-NEXT: add sp, sp, a1
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; CHECK-NEXT: lui a1, 8
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; CHECK-NEXT: addi a1, a1, -1952
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; CHECK-NEXT: add sp, sp, a1
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; CHECK-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s1, 2008(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s2, 2000(sp) # 8-byte Folded Reload
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; CHECK-NEXT: ld s3, 1992(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 2032
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; CHECK-NEXT: ret
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%1 = alloca %"buff", align 8
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call void @llvm.memset.p0.i64(ptr %1, i8 86, i64 56, i1 false)
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call void @bar()
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call void @llvm.memset.p0.i64(ptr %1, i8 86, i64 56, i1 false)
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ret i1 false
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}
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