derek.holloway
7502bf64a4
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72 lines
1.9 KiB
LLVM
72 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefixes=RV64I
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; RUN: llc -mtriple=riscv64 -mattr=+xtheadbs -verify-machineinstrs < %s \
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; RUN: | FileCheck %s -check-prefixes=RV64XTHEADBS
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define signext i32 @th_tst_i32(i32 signext %a) nounwind {
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; RV64I-LABEL: th_tst_i32:
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; RV64I: # %bb.0:
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; RV64I-NEXT: slli a0, a0, 58
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; RV64I-NEXT: srli a0, a0, 63
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; RV64I-NEXT: ret
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;
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; RV64XTHEADBS-LABEL: th_tst_i32:
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; RV64XTHEADBS: # %bb.0:
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; RV64XTHEADBS-NEXT: th.tst a0, a0, 5
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; RV64XTHEADBS-NEXT: ret
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%shr = lshr i32 %a, 5
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%and = and i32 %shr, 1
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ret i32 %and
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}
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define i64 @the_tst_i64(i64 %a) nounwind {
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; RV64I-LABEL: the_tst_i64:
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; RV64I: # %bb.0:
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; RV64I-NEXT: slli a0, a0, 58
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; RV64I-NEXT: srli a0, a0, 63
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; RV64I-NEXT: ret
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;
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; RV64XTHEADBS-LABEL: the_tst_i64:
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; RV64XTHEADBS: # %bb.0:
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; RV64XTHEADBS-NEXT: th.tst a0, a0, 5
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; RV64XTHEADBS-NEXT: ret
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%shr = lshr i64 %a, 5
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%and = and i64 %shr, 1
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ret i64 %and
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}
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define signext i32 @th_tst_i32_cmp(i32 signext %a) nounwind {
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; RV64I-LABEL: th_tst_i32_cmp:
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; RV64I: # %bb.0:
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; RV64I-NEXT: slli a0, a0, 58
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; RV64I-NEXT: srli a0, a0, 63
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; RV64I-NEXT: ret
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;
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; RV64XTHEADBS-LABEL: th_tst_i32_cmp:
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; RV64XTHEADBS: # %bb.0:
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; RV64XTHEADBS-NEXT: th.tst a0, a0, 5
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; RV64XTHEADBS-NEXT: ret
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%and = and i32 %a, 32
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%cmp = icmp ne i32 %and, 0
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%zext = zext i1 %cmp to i32
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ret i32 %zext
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}
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define i64 @th_tst_i64_cmp(i64 %a) nounwind {
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; RV64I-LABEL: th_tst_i64_cmp:
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; RV64I: # %bb.0:
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; RV64I-NEXT: slli a0, a0, 58
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; RV64I-NEXT: srli a0, a0, 63
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; RV64I-NEXT: ret
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;
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; RV64XTHEADBS-LABEL: th_tst_i64_cmp:
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; RV64XTHEADBS: # %bb.0:
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; RV64XTHEADBS-NEXT: th.tst a0, a0, 5
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; RV64XTHEADBS-NEXT: ret
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%and = and i64 %a, 32
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%cmp = icmp ne i64 %and, 0
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%zext = zext i1 %cmp to i64
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ret i64 %zext
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}
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