derek.holloway
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78 lines
2.7 KiB
LLVM
78 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+experimental-p,+m,+zbb \
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; RUN: -verify-machineinstrs < %s | \
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; RUN: FileCheck --check-prefixes=CHECK-RV32 %s
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; RUN: llc -mtriple=riscv64 -mattr=+experimental-p,+m,+zbb \
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; RUN: -verify-machineinstrs < %s | \
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; RUN: FileCheck --check-prefixes=CHECK-RV64 %s
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; Regression test: combinePExtTruncate must not crash when the operand of a
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; narrowing shift is not a MUL/SUB (e.g. a plain function argument).
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define i32 @trunc_lshr_v2i32_to_v2i16(i64 %a.coerce) {
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; CHECK-RV32-LABEL: trunc_lshr_v2i32_to_v2i16:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: psrli.dw a0, a0, 8
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; CHECK-RV32-NEXT: pack a0, a0, a1
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; CHECK-RV32-NEXT: ret
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;
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; CHECK-RV64-LABEL: trunc_lshr_v2i32_to_v2i16:
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; CHECK-RV64: # %bb.0:
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; CHECK-RV64-NEXT: psrli.w a0, a0, 8
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; CHECK-RV64-NEXT: srli a1, a0, 32
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; CHECK-RV64-NEXT: ppaire.h a0, a0, a1
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; CHECK-RV64-NEXT: ret
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%v = bitcast i64 %a.coerce to <2 x i32>
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%shr = lshr <2 x i32> %v, splat (i32 8)
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%conv = trunc <2 x i32> %shr to <2 x i16>
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%ret = bitcast <2 x i16> %conv to i32
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ret i32 %ret
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}
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define i32 @trunc_ashr_v2i32_to_v2i16(i64 %a.coerce) {
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; CHECK-RV32-LABEL: trunc_ashr_v2i32_to_v2i16:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: psrli.dw a0, a0, 8
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; CHECK-RV32-NEXT: pack a0, a0, a1
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; CHECK-RV32-NEXT: ret
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;
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; CHECK-RV64-LABEL: trunc_ashr_v2i32_to_v2i16:
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; CHECK-RV64: # %bb.0:
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; CHECK-RV64-NEXT: psrli.w a0, a0, 8
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; CHECK-RV64-NEXT: srli a1, a0, 32
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; CHECK-RV64-NEXT: ppaire.h a0, a0, a1
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; CHECK-RV64-NEXT: ret
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%v = bitcast i64 %a.coerce to <2 x i32>
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%shr = ashr <2 x i32> %v, splat (i32 8)
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%conv = trunc <2 x i32> %shr to <2 x i16>
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%ret = bitcast <2 x i16> %conv to i32
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ret i32 %ret
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}
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define i32 @trunc_lshr_v4i16_to_v4i8(i64 %a.coerce) {
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; CHECK-RV32-LABEL: trunc_lshr_v4i16_to_v4i8:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: psrli.dh a0, a0, 4
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; CHECK-RV32-NEXT: srli a3, a1, 16
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; CHECK-RV32-NEXT: srli a2, a0, 16
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; CHECK-RV32-NEXT: ppaire.db a0, a0, a2
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; CHECK-RV32-NEXT: pack a0, a0, a1
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; CHECK-RV32-NEXT: ret
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;
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; CHECK-RV64-LABEL: trunc_lshr_v4i16_to_v4i8:
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; CHECK-RV64: # %bb.0:
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; CHECK-RV64-NEXT: psrli.h a0, a0, 4
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; CHECK-RV64-NEXT: srli a1, a0, 48
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; CHECK-RV64-NEXT: srli a2, a0, 32
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; CHECK-RV64-NEXT: ppaire.b a1, a2, a1
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; CHECK-RV64-NEXT: srli a2, a0, 16
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; CHECK-RV64-NEXT: ppaire.b a0, a0, a2
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; CHECK-RV64-NEXT: ppaire.h a0, a0, a1
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; CHECK-RV64-NEXT: ret
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%v = bitcast i64 %a.coerce to <4 x i16>
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%shr = lshr <4 x i16> %v, splat (i16 4)
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%conv = trunc <4 x i16> %shr to <4 x i8>
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%ret = bitcast <4 x i8> %conv to i32
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ret i32 %ret
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}
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