derek.holloway
7502bf64a4
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85 lines
3.0 KiB
LLVM
85 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+zve64x -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefixes=RV32,RV32-ZVE64
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; RUN: llc -mtriple=riscv64 -mattr=+zve64x -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefixes=RV64,RV64-ZVE64
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; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefixes=RV32,RV32-V
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefixes=RV64,RV64-V
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define ptr @scalar_stack_align16() nounwind {
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; RV32-ZVE64-LABEL: scalar_stack_align16:
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; RV32-ZVE64: # %bb.0:
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; RV32-ZVE64-NEXT: addi sp, sp, -48
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; RV32-ZVE64-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
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; RV32-ZVE64-NEXT: csrr a0, vlenb
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; RV32-ZVE64-NEXT: slli a0, a0, 1
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; RV32-ZVE64-NEXT: sub sp, sp, a0
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; RV32-ZVE64-NEXT: addi a0, sp, 32
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; RV32-ZVE64-NEXT: call extern
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; RV32-ZVE64-NEXT: addi a0, sp, 16
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; RV32-ZVE64-NEXT: csrr a1, vlenb
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; RV32-ZVE64-NEXT: slli a1, a1, 1
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; RV32-ZVE64-NEXT: add sp, sp, a1
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; RV32-ZVE64-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
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; RV32-ZVE64-NEXT: addi sp, sp, 48
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; RV32-ZVE64-NEXT: ret
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;
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; RV64-ZVE64-LABEL: scalar_stack_align16:
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; RV64-ZVE64: # %bb.0:
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; RV64-ZVE64-NEXT: addi sp, sp, -48
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; RV64-ZVE64-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
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; RV64-ZVE64-NEXT: csrr a0, vlenb
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; RV64-ZVE64-NEXT: slli a0, a0, 1
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; RV64-ZVE64-NEXT: sub sp, sp, a0
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; RV64-ZVE64-NEXT: addi a0, sp, 32
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; RV64-ZVE64-NEXT: call extern
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; RV64-ZVE64-NEXT: addi a0, sp, 16
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; RV64-ZVE64-NEXT: csrr a1, vlenb
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; RV64-ZVE64-NEXT: slli a1, a1, 1
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; RV64-ZVE64-NEXT: add sp, sp, a1
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; RV64-ZVE64-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
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; RV64-ZVE64-NEXT: addi sp, sp, 48
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; RV64-ZVE64-NEXT: ret
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;
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; RV32-V-LABEL: scalar_stack_align16:
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; RV32-V: # %bb.0:
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; RV32-V-NEXT: addi sp, sp, -48
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; RV32-V-NEXT: sw ra, 44(sp) # 4-byte Folded Spill
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; RV32-V-NEXT: csrr a0, vlenb
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; RV32-V-NEXT: sub sp, sp, a0
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; RV32-V-NEXT: addi a0, sp, 32
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; RV32-V-NEXT: call extern
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; RV32-V-NEXT: addi a0, sp, 16
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; RV32-V-NEXT: csrr a1, vlenb
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; RV32-V-NEXT: add sp, sp, a1
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; RV32-V-NEXT: lw ra, 44(sp) # 4-byte Folded Reload
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; RV32-V-NEXT: addi sp, sp, 48
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; RV32-V-NEXT: ret
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;
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; RV64-V-LABEL: scalar_stack_align16:
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; RV64-V: # %bb.0:
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; RV64-V-NEXT: addi sp, sp, -48
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; RV64-V-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
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; RV64-V-NEXT: csrr a0, vlenb
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; RV64-V-NEXT: sub sp, sp, a0
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; RV64-V-NEXT: addi a0, sp, 32
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; RV64-V-NEXT: call extern
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; RV64-V-NEXT: addi a0, sp, 16
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; RV64-V-NEXT: csrr a1, vlenb
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; RV64-V-NEXT: add sp, sp, a1
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; RV64-V-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
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; RV64-V-NEXT: addi sp, sp, 48
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; RV64-V-NEXT: ret
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%a = alloca <vscale x 2 x i32>
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%c = alloca i64, align 16
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call void @extern(ptr %a)
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ret ptr %c
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}
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declare void @extern(ptr)
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; RV32: {{.*}}
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; RV64: {{.*}}
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