derek.holloway
7502bf64a4
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515 lines
21 KiB
LLVM
515 lines
21 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v,+zvfbfmin -target-abi=ilp32d \
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; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
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; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v,+zvfbfmin -target-abi=lp64d \
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; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
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; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v,+experimental-zvfbfa \
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; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFBFA
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; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v,+experimental-zvfbfa \
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; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFBFA
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define <vscale x 1 x double> @vfwmul_vv_nxv1f64(<vscale x 1 x float> %va, <vscale x 1 x float> %vb) {
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; CHECK-LABEL: vfwmul_vv_nxv1f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
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; CHECK-NEXT: vfwmul.vv v10, v8, v9
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; CHECK-NEXT: vmv1r.v v8, v10
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; CHECK-NEXT: ret
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%vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
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%vd = fpext <vscale x 1 x float> %vb to <vscale x 1 x double>
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%ve = fmul <vscale x 1 x double> %vc, %vd
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ret <vscale x 1 x double> %ve
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}
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define <vscale x 1 x double> @vfwmul_vf_nxv1f64(<vscale x 1 x float> %va, float %b) {
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; CHECK-LABEL: vfwmul_vf_nxv1f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
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; CHECK-NEXT: vfwmul.vf v9, v8, fa0
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; CHECK-NEXT: vmv1r.v v8, v9
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; CHECK-NEXT: ret
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%head = insertelement <vscale x 1 x float> poison, float %b, i32 0
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%splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
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%vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
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%vd = fpext <vscale x 1 x float> %splat to <vscale x 1 x double>
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%ve = fmul <vscale x 1 x double> %vc, %vd
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ret <vscale x 1 x double> %ve
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}
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define <vscale x 1 x double> @vfwmul_vf_nxv1f64_2(<vscale x 1 x float> %va, float %b) {
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; CHECK-LABEL: vfwmul_vf_nxv1f64_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
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; CHECK-NEXT: vfwmul.vf v9, v8, fa0
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; CHECK-NEXT: vmv1r.v v8, v9
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; CHECK-NEXT: ret
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%fpext = fpext float %b to double
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%head = insertelement <vscale x 1 x double> poison, double %fpext, i32 0
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%splat = shufflevector <vscale x 1 x double> %head, <vscale x 1 x double> poison, <vscale x 1 x i32> zeroinitializer
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%vc = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
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%ve = fmul <vscale x 1 x double> %vc, %splat
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ret <vscale x 1 x double> %ve
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}
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define <vscale x 2 x double> @vfwmul_vv_nxv2f64(<vscale x 2 x float> %va, <vscale x 2 x float> %vb) {
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; CHECK-LABEL: vfwmul_vv_nxv2f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
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; CHECK-NEXT: vmv1r.v v10, v9
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; CHECK-NEXT: vmv1r.v v11, v8
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; CHECK-NEXT: vfwmul.vv v8, v11, v10
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; CHECK-NEXT: ret
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%vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>
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%vd = fpext <vscale x 2 x float> %vb to <vscale x 2 x double>
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%ve = fmul <vscale x 2 x double> %vc, %vd
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ret <vscale x 2 x double> %ve
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}
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define <vscale x 2 x double> @vfwmul_vf_nxv2f64(<vscale x 2 x float> %va, float %b) {
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; CHECK-LABEL: vfwmul_vf_nxv2f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
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; CHECK-NEXT: vmv1r.v v10, v8
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; CHECK-NEXT: vfwmul.vf v8, v10, fa0
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; CHECK-NEXT: ret
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%head = insertelement <vscale x 2 x float> poison, float %b, i32 0
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%splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
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%vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>
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%vd = fpext <vscale x 2 x float> %splat to <vscale x 2 x double>
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%ve = fmul <vscale x 2 x double> %vc, %vd
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ret <vscale x 2 x double> %ve
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}
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define <vscale x 2 x double> @vfwmul_vf_nxv2f64_2(<vscale x 2 x float> %va, float %b) {
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; CHECK-LABEL: vfwmul_vf_nxv2f64_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
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; CHECK-NEXT: vmv1r.v v10, v8
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; CHECK-NEXT: vfwmul.vf v8, v10, fa0
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; CHECK-NEXT: ret
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%fpext = fpext float %b to double
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%head = insertelement <vscale x 2 x double> poison, double %fpext, i32 0
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%splat = shufflevector <vscale x 2 x double> %head, <vscale x 2 x double> poison, <vscale x 2 x i32> zeroinitializer
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%vc = fpext <vscale x 2 x float> %va to <vscale x 2 x double>
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%ve = fmul <vscale x 2 x double> %vc, %splat
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ret <vscale x 2 x double> %ve
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}
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define <vscale x 4 x double> @vfwmul_vv_nxv4f64(<vscale x 4 x float> %va, <vscale x 4 x float> %vb) {
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; CHECK-LABEL: vfwmul_vv_nxv4f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
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; CHECK-NEXT: vmv2r.v v12, v10
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; CHECK-NEXT: vmv2r.v v14, v8
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; CHECK-NEXT: vfwmul.vv v8, v14, v12
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; CHECK-NEXT: ret
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%vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>
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%vd = fpext <vscale x 4 x float> %vb to <vscale x 4 x double>
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%ve = fmul <vscale x 4 x double> %vc, %vd
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ret <vscale x 4 x double> %ve
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}
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define <vscale x 4 x double> @vfwmul_vf_nxv4f64(<vscale x 4 x float> %va, float %b) {
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; CHECK-LABEL: vfwmul_vf_nxv4f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
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; CHECK-NEXT: vmv2r.v v12, v8
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; CHECK-NEXT: vfwmul.vf v8, v12, fa0
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; CHECK-NEXT: ret
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%head = insertelement <vscale x 4 x float> poison, float %b, i32 0
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%splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
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%vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>
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%vd = fpext <vscale x 4 x float> %splat to <vscale x 4 x double>
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%ve = fmul <vscale x 4 x double> %vc, %vd
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ret <vscale x 4 x double> %ve
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}
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define <vscale x 4 x double> @vfwmul_vf_nxv4f64_2(<vscale x 4 x float> %va, float %b) {
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; CHECK-LABEL: vfwmul_vf_nxv4f64_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
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; CHECK-NEXT: vmv2r.v v12, v8
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; CHECK-NEXT: vfwmul.vf v8, v12, fa0
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; CHECK-NEXT: ret
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%fpext = fpext float %b to double
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%head = insertelement <vscale x 4 x double> poison, double %fpext, i32 0
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%splat = shufflevector <vscale x 4 x double> %head, <vscale x 4 x double> poison, <vscale x 4 x i32> zeroinitializer
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%vc = fpext <vscale x 4 x float> %va to <vscale x 4 x double>
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%ve = fmul <vscale x 4 x double> %vc, %splat
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ret <vscale x 4 x double> %ve
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}
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define <vscale x 8 x double> @vfwmul_vv_nxv8f64(<vscale x 8 x float> %va, <vscale x 8 x float> %vb) {
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; CHECK-LABEL: vfwmul_vv_nxv8f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
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; CHECK-NEXT: vmv4r.v v16, v12
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; CHECK-NEXT: vmv4r.v v20, v8
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; CHECK-NEXT: vfwmul.vv v8, v20, v16
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; CHECK-NEXT: ret
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%vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>
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%vd = fpext <vscale x 8 x float> %vb to <vscale x 8 x double>
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%ve = fmul <vscale x 8 x double> %vc, %vd
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ret <vscale x 8 x double> %ve
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}
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define <vscale x 8 x double> @vfwmul_vf_nxv8f64(<vscale x 8 x float> %va, float %b) {
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; CHECK-LABEL: vfwmul_vf_nxv8f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
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; CHECK-NEXT: vmv4r.v v16, v8
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; CHECK-NEXT: vfwmul.vf v8, v16, fa0
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; CHECK-NEXT: ret
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%head = insertelement <vscale x 8 x float> poison, float %b, i32 0
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%splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
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%vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>
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%vd = fpext <vscale x 8 x float> %splat to <vscale x 8 x double>
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%ve = fmul <vscale x 8 x double> %vc, %vd
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ret <vscale x 8 x double> %ve
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}
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define <vscale x 8 x double> @vfwmul_vf_nxv8f64_2(<vscale x 8 x float> %va, float %b) {
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; CHECK-LABEL: vfwmul_vf_nxv8f64_2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
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; CHECK-NEXT: vmv4r.v v16, v8
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; CHECK-NEXT: vfwmul.vf v8, v16, fa0
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; CHECK-NEXT: ret
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%fpext = fpext float %b to double
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%head = insertelement <vscale x 8 x double> poison, double %fpext, i32 0
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%splat = shufflevector <vscale x 8 x double> %head, <vscale x 8 x double> poison, <vscale x 8 x i32> zeroinitializer
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%vc = fpext <vscale x 8 x float> %va to <vscale x 8 x double>
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%ve = fmul <vscale x 8 x double> %vc, %splat
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ret <vscale x 8 x double> %ve
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}
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define <vscale x 1 x double> @vfwmul_vv_nxv1f64_same_op(<vscale x 1 x float> %va) {
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; CHECK-LABEL: vfwmul_vv_nxv1f64_same_op:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, mf2, ta, ma
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; CHECK-NEXT: vfwmul.vv v9, v8, v8
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; CHECK-NEXT: vmv1r.v v8, v9
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; CHECK-NEXT: ret
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%vb = fpext <vscale x 1 x float> %va to <vscale x 1 x double>
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%vc = fmul <vscale x 1 x double> %vb, %vb
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ret <vscale x 1 x double> %vc
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}
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define <vscale x 1 x float> @vfwmul_vv_nxv1f32(<vscale x 1 x bfloat> %va, <vscale x 1 x bfloat> %vb) {
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; ZVFH-LABEL: vfwmul_vv_nxv1f32:
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; ZVFH: # %bb.0:
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; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
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; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8
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; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9
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; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
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; ZVFH-NEXT: vfmul.vv v8, v10, v8
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; ZVFH-NEXT: ret
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;
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; ZVFBFA-LABEL: vfwmul_vv_nxv1f32:
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; ZVFBFA: # %bb.0:
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; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, mf4, ta, ma
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; ZVFBFA-NEXT: vfwmul.vv v10, v8, v9
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; ZVFBFA-NEXT: vmv1r.v v8, v10
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; ZVFBFA-NEXT: ret
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%vc = fpext <vscale x 1 x bfloat> %va to <vscale x 1 x float>
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%vd = fpext <vscale x 1 x bfloat> %vb to <vscale x 1 x float>
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%ve = fmul <vscale x 1 x float> %vc, %vd
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ret <vscale x 1 x float> %ve
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}
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define <vscale x 1 x float> @vfwmul_vf_nxv1f32(<vscale x 1 x bfloat> %va, bfloat %b) {
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; ZVFH-LABEL: vfwmul_vf_nxv1f32:
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; ZVFH: # %bb.0:
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; ZVFH-NEXT: fmv.x.w a0, fa0
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; ZVFH-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
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; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8
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; ZVFH-NEXT: slli a0, a0, 16
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; ZVFH-NEXT: fmv.w.x fa5, a0
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; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
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; ZVFH-NEXT: vfmul.vf v8, v9, fa5
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; ZVFH-NEXT: ret
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;
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; ZVFBFA-LABEL: vfwmul_vf_nxv1f32:
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; ZVFBFA: # %bb.0:
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; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, mf4, ta, ma
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; ZVFBFA-NEXT: vfwmul.vf v9, v8, fa0
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; ZVFBFA-NEXT: vmv1r.v v8, v9
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; ZVFBFA-NEXT: ret
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%head = insertelement <vscale x 1 x bfloat> poison, bfloat %b, i32 0
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%splat = shufflevector <vscale x 1 x bfloat> %head, <vscale x 1 x bfloat> poison, <vscale x 1 x i32> zeroinitializer
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%vc = fpext <vscale x 1 x bfloat> %va to <vscale x 1 x float>
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%vd = fpext <vscale x 1 x bfloat> %splat to <vscale x 1 x float>
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%ve = fmul <vscale x 1 x float> %vc, %vd
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ret <vscale x 1 x float> %ve
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}
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define <vscale x 1 x float> @vfwmul_vf_nxv1f32_2(<vscale x 1 x bfloat> %va, bfloat %b) {
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; ZVFH-LABEL: vfwmul_vf_nxv1f32_2:
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; ZVFH: # %bb.0:
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; ZVFH-NEXT: fmv.x.w a0, fa0
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; ZVFH-NEXT: slli a0, a0, 16
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; ZVFH-NEXT: fmv.w.x fa5, a0
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; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
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; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8
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; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
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; ZVFH-NEXT: vfmul.vf v8, v9, fa5
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; ZVFH-NEXT: ret
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;
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; ZVFBFA-LABEL: vfwmul_vf_nxv1f32_2:
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; ZVFBFA: # %bb.0:
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; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, mf4, ta, ma
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; ZVFBFA-NEXT: vfwmul.vf v9, v8, fa0
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; ZVFBFA-NEXT: vmv1r.v v8, v9
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; ZVFBFA-NEXT: ret
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%fpext = fpext bfloat %b to float
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%head = insertelement <vscale x 1 x float> poison, float %fpext, i32 0
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%splat = shufflevector <vscale x 1 x float> %head, <vscale x 1 x float> poison, <vscale x 1 x i32> zeroinitializer
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%vc = fpext <vscale x 1 x bfloat> %va to <vscale x 1 x float>
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%ve = fmul <vscale x 1 x float> %vc, %splat
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ret <vscale x 1 x float> %ve
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}
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define <vscale x 2 x float> @vfwmul_vv_nxv2f32(<vscale x 2 x bfloat> %va, <vscale x 2 x bfloat> %vb) {
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; ZVFH-LABEL: vfwmul_vv_nxv2f32:
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; ZVFH: # %bb.0:
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; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
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; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8
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; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9
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; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma
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; ZVFH-NEXT: vfmul.vv v8, v10, v8
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; ZVFH-NEXT: ret
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;
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; ZVFBFA-LABEL: vfwmul_vv_nxv2f32:
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; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, mf2, ta, ma
|
|
; ZVFBFA-NEXT: vfwmul.vv v10, v8, v9
|
|
; ZVFBFA-NEXT: vmv1r.v v8, v10
|
|
; ZVFBFA-NEXT: ret
|
|
%vc = fpext <vscale x 2 x bfloat> %va to <vscale x 2 x float>
|
|
%vd = fpext <vscale x 2 x bfloat> %vb to <vscale x 2 x float>
|
|
%ve = fmul <vscale x 2 x float> %vc, %vd
|
|
ret <vscale x 2 x float> %ve
|
|
}
|
|
|
|
define <vscale x 2 x float> @vfwmul_vf_nxv2f32(<vscale x 2 x bfloat> %va, bfloat %b) {
|
|
; ZVFH-LABEL: vfwmul_vf_nxv2f32:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: vsetvli a1, zero, e16, mf2, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8
|
|
; ZVFH-NEXT: slli a0, a0, 16
|
|
; ZVFH-NEXT: fmv.w.x fa5, a0
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma
|
|
; ZVFH-NEXT: vfmul.vf v8, v9, fa5
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_nxv2f32:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, mf2, ta, ma
|
|
; ZVFBFA-NEXT: vfwmul.vf v9, v8, fa0
|
|
; ZVFBFA-NEXT: vmv1r.v v8, v9
|
|
; ZVFBFA-NEXT: ret
|
|
%head = insertelement <vscale x 2 x bfloat> poison, bfloat %b, i32 0
|
|
%splat = shufflevector <vscale x 2 x bfloat> %head, <vscale x 2 x bfloat> poison, <vscale x 2 x i32> zeroinitializer
|
|
%vc = fpext <vscale x 2 x bfloat> %va to <vscale x 2 x float>
|
|
%vd = fpext <vscale x 2 x bfloat> %splat to <vscale x 2 x float>
|
|
%ve = fmul <vscale x 2 x float> %vc, %vd
|
|
ret <vscale x 2 x float> %ve
|
|
}
|
|
|
|
define <vscale x 2 x float> @vfwmul_vf_nxv2f32_2(<vscale x 2 x bfloat> %va, bfloat %b) {
|
|
; ZVFH-LABEL: vfwmul_vf_nxv2f32_2:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: slli a0, a0, 16
|
|
; ZVFH-NEXT: fmv.w.x fa5, a0
|
|
; ZVFH-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma
|
|
; ZVFH-NEXT: vfmul.vf v8, v9, fa5
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_nxv2f32_2:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, mf2, ta, ma
|
|
; ZVFBFA-NEXT: vfwmul.vf v9, v8, fa0
|
|
; ZVFBFA-NEXT: vmv1r.v v8, v9
|
|
; ZVFBFA-NEXT: ret
|
|
%fpext = fpext bfloat %b to float
|
|
%head = insertelement <vscale x 2 x float> poison, float %fpext, i32 0
|
|
%splat = shufflevector <vscale x 2 x float> %head, <vscale x 2 x float> poison, <vscale x 2 x i32> zeroinitializer
|
|
%vc = fpext <vscale x 2 x bfloat> %va to <vscale x 2 x float>
|
|
%ve = fmul <vscale x 2 x float> %vc, %splat
|
|
ret <vscale x 2 x float> %ve
|
|
}
|
|
|
|
define <vscale x 4 x float> @vfwmul_vv_nxv4f32(<vscale x 4 x bfloat> %va, <vscale x 4 x bfloat> %vb) {
|
|
; ZVFH-LABEL: vfwmul_vv_nxv4f32:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v9
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v10, v12
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vv_nxv4f32:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, m1, ta, ma
|
|
; ZVFBFA-NEXT: vmv1r.v v10, v9
|
|
; ZVFBFA-NEXT: vmv1r.v v11, v8
|
|
; ZVFBFA-NEXT: vfwmul.vv v8, v11, v10
|
|
; ZVFBFA-NEXT: ret
|
|
%vc = fpext <vscale x 4 x bfloat> %va to <vscale x 4 x float>
|
|
%vd = fpext <vscale x 4 x bfloat> %vb to <vscale x 4 x float>
|
|
%ve = fmul <vscale x 4 x float> %vc, %vd
|
|
ret <vscale x 4 x float> %ve
|
|
}
|
|
|
|
define <vscale x 4 x float> @vfwmul_vf_nxv4f32(<vscale x 4 x bfloat> %va, bfloat %b) {
|
|
; ZVFH-LABEL: vfwmul_vf_nxv4f32:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: vsetvli a1, zero, e16, m1, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8
|
|
; ZVFH-NEXT: slli a0, a0, 16
|
|
; ZVFH-NEXT: fmv.w.x fa5, a0
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vf v8, v10, fa5
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_nxv4f32:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, m1, ta, ma
|
|
; ZVFBFA-NEXT: vmv1r.v v10, v8
|
|
; ZVFBFA-NEXT: vfwmul.vf v8, v10, fa0
|
|
; ZVFBFA-NEXT: ret
|
|
%head = insertelement <vscale x 4 x bfloat> poison, bfloat %b, i32 0
|
|
%splat = shufflevector <vscale x 4 x bfloat> %head, <vscale x 4 x bfloat> poison, <vscale x 4 x i32> zeroinitializer
|
|
%vc = fpext <vscale x 4 x bfloat> %va to <vscale x 4 x float>
|
|
%vd = fpext <vscale x 4 x bfloat> %splat to <vscale x 4 x float>
|
|
%ve = fmul <vscale x 4 x float> %vc, %vd
|
|
ret <vscale x 4 x float> %ve
|
|
}
|
|
|
|
define <vscale x 4 x float> @vfwmul_vf_nxv4f32_2(<vscale x 4 x bfloat> %va, bfloat %b) {
|
|
; ZVFH-LABEL: vfwmul_vf_nxv4f32_2:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: slli a0, a0, 16
|
|
; ZVFH-NEXT: fmv.w.x fa5, a0
|
|
; ZVFH-NEXT: vsetvli a0, zero, e16, m1, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vf v8, v10, fa5
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_nxv4f32_2:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, m1, ta, ma
|
|
; ZVFBFA-NEXT: vmv1r.v v10, v8
|
|
; ZVFBFA-NEXT: vfwmul.vf v8, v10, fa0
|
|
; ZVFBFA-NEXT: ret
|
|
%fpext = fpext bfloat %b to float
|
|
%head = insertelement <vscale x 4 x float> poison, float %fpext, i32 0
|
|
%splat = shufflevector <vscale x 4 x float> %head, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
|
|
%vc = fpext <vscale x 4 x bfloat> %va to <vscale x 4 x float>
|
|
%ve = fmul <vscale x 4 x float> %vc, %splat
|
|
ret <vscale x 4 x float> %ve
|
|
}
|
|
|
|
define <vscale x 8 x float> @vfwmul_vv_nxv8f32(<vscale x 8 x bfloat> %va, <vscale x 8 x bfloat> %vb) {
|
|
; ZVFH-LABEL: vfwmul_vv_nxv8f32:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v8
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v10
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v12, v16
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vv_nxv8f32:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, m2, ta, ma
|
|
; ZVFBFA-NEXT: vmv2r.v v12, v10
|
|
; ZVFBFA-NEXT: vmv2r.v v14, v8
|
|
; ZVFBFA-NEXT: vfwmul.vv v8, v14, v12
|
|
; ZVFBFA-NEXT: ret
|
|
%vc = fpext <vscale x 8 x bfloat> %va to <vscale x 8 x float>
|
|
%vd = fpext <vscale x 8 x bfloat> %vb to <vscale x 8 x float>
|
|
%ve = fmul <vscale x 8 x float> %vc, %vd
|
|
ret <vscale x 8 x float> %ve
|
|
}
|
|
|
|
define <vscale x 8 x float> @vfwmul_vf_nxv8f32(<vscale x 8 x bfloat> %va, bfloat %b) {
|
|
; ZVFH-LABEL: vfwmul_vf_nxv8f32:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: vsetvli a1, zero, e16, m2, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v8
|
|
; ZVFH-NEXT: slli a0, a0, 16
|
|
; ZVFH-NEXT: fmv.w.x fa5, a0
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma
|
|
; ZVFH-NEXT: vfmul.vf v8, v12, fa5
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_nxv8f32:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, m2, ta, ma
|
|
; ZVFBFA-NEXT: vmv2r.v v12, v8
|
|
; ZVFBFA-NEXT: vfwmul.vf v8, v12, fa0
|
|
; ZVFBFA-NEXT: ret
|
|
%head = insertelement <vscale x 8 x bfloat> poison, bfloat %b, i32 0
|
|
%splat = shufflevector <vscale x 8 x bfloat> %head, <vscale x 8 x bfloat> poison, <vscale x 8 x i32> zeroinitializer
|
|
%vc = fpext <vscale x 8 x bfloat> %va to <vscale x 8 x float>
|
|
%vd = fpext <vscale x 8 x bfloat> %splat to <vscale x 8 x float>
|
|
%ve = fmul <vscale x 8 x float> %vc, %vd
|
|
ret <vscale x 8 x float> %ve
|
|
}
|
|
|
|
define <vscale x 8 x float> @vfwmul_vf_nxv8f32_2(<vscale x 8 x bfloat> %va, bfloat %b) {
|
|
; ZVFH-LABEL: vfwmul_vf_nxv8f32_2:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: slli a0, a0, 16
|
|
; ZVFH-NEXT: fmv.w.x fa5, a0
|
|
; ZVFH-NEXT: vsetvli a0, zero, e16, m2, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v8
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma
|
|
; ZVFH-NEXT: vfmul.vf v8, v12, fa5
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_nxv8f32_2:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, m2, ta, ma
|
|
; ZVFBFA-NEXT: vmv2r.v v12, v8
|
|
; ZVFBFA-NEXT: vfwmul.vf v8, v12, fa0
|
|
; ZVFBFA-NEXT: ret
|
|
%fpext = fpext bfloat %b to float
|
|
%head = insertelement <vscale x 8 x float> poison, float %fpext, i32 0
|
|
%splat = shufflevector <vscale x 8 x float> %head, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
|
|
%vc = fpext <vscale x 8 x bfloat> %va to <vscale x 8 x float>
|
|
%ve = fmul <vscale x 8 x float> %vc, %splat
|
|
ret <vscale x 8 x float> %ve
|
|
}
|
|
|
|
define <vscale x 1 x float> @vfwmul_vv_nxv1f32_same_op(<vscale x 1 x bfloat> %va) {
|
|
; ZVFH-LABEL: vfwmul_vv_nxv1f32_same_op:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetvli a0, zero, e16, mf4, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v9, v9
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vv_nxv1f32_same_op:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetvli a0, zero, e16alt, mf4, ta, ma
|
|
; ZVFBFA-NEXT: vfwmul.vv v9, v8, v8
|
|
; ZVFBFA-NEXT: vmv1r.v v8, v9
|
|
; ZVFBFA-NEXT: ret
|
|
%vb = fpext <vscale x 1 x bfloat> %va to <vscale x 1 x float>
|
|
%vc = fmul <vscale x 1 x float> %vb, %vb
|
|
ret <vscale x 1 x float> %vc
|
|
}
|