derek.holloway
7502bf64a4
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140 lines
4.2 KiB
LLVM
140 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s -verify-machineinstrs -mtriple=riscv32 -mattr=+xqcili | FileCheck %s --check-prefixes=RV32I
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; RUN: llc < %s -verify-machineinstrs -mtriple=riscv64 | FileCheck %s --check-prefixes=RV64I
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; RUN: llc < %s -verify-machineinstrs -mtriple=riscv32 -mattr=+xqcili,+short-forward-branch-ialu | \
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; RUN: FileCheck %s --check-prefixes=RV32I-SFB
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; RUN: llc < %s -verify-machineinstrs -mtriple=riscv64 -mattr=+short-forward-branch-ialu | \
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; RUN: FileCheck %s --check-prefixes=RV64I-SFB
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define i32 @select_example_1(i32 %a, i32 %b, i1 zeroext %x, i32 %y) {
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; RV32I-LABEL: select_example_1:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: lui a0, 16
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; RV32I-NEXT: bnez a2, .LBB0_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: mv a0, a1
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; RV32I-NEXT: .LBB0_2: # %entry
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: select_example_1:
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; RV64I: # %bb.0: # %entry
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; RV64I-NEXT: lui a0, 16
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; RV64I-NEXT: bnez a2, .LBB0_2
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; RV64I-NEXT: # %bb.1: # %entry
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; RV64I-NEXT: mv a0, a1
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; RV64I-NEXT: .LBB0_2: # %entry
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; RV64I-NEXT: ret
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;
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; RV32I-SFB-LABEL: select_example_1:
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; RV32I-SFB: # %bb.0: # %entry
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; RV32I-SFB-NEXT: mv a0, a1
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; RV32I-SFB-NEXT: beqz a2, .LBB0_2
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; RV32I-SFB-NEXT: # %bb.1: # %entry
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; RV32I-SFB-NEXT: lui a0, 16
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; RV32I-SFB-NEXT: .LBB0_2: # %entry
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; RV32I-SFB-NEXT: ret
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;
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; RV64I-SFB-LABEL: select_example_1:
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; RV64I-SFB: # %bb.0: # %entry
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; RV64I-SFB-NEXT: mv a0, a1
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; RV64I-SFB-NEXT: beqz a2, .LBB0_2
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; RV64I-SFB-NEXT: # %bb.1: # %entry
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; RV64I-SFB-NEXT: lui a0, 16
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; RV64I-SFB-NEXT: .LBB0_2: # %entry
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; RV64I-SFB-NEXT: ret
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entry:
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%sel = select i1 %x, i32 65536, i32 %b
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ret i32 %sel
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}
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define i32 @select_example_2(i32 %a, i32 %b, i1 zeroext %x, i32 %y) {
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; RV32I-LABEL: select_example_2:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: bnez a2, .LBB1_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: mv a0, a1
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB1_2:
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; RV32I-NEXT: qc.li a0, 65543
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: select_example_2:
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; RV64I: # %bb.0: # %entry
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; RV64I-NEXT: bnez a2, .LBB1_2
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; RV64I-NEXT: # %bb.1: # %entry
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; RV64I-NEXT: mv a0, a1
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; RV64I-NEXT: ret
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; RV64I-NEXT: .LBB1_2:
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; RV64I-NEXT: lui a0, 16
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; RV64I-NEXT: addi a0, a0, 7
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; RV64I-NEXT: ret
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;
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; RV32I-SFB-LABEL: select_example_2:
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; RV32I-SFB: # %bb.0: # %entry
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; RV32I-SFB-NEXT: mv a0, a1
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; RV32I-SFB-NEXT: beqz a2, .LBB1_2
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; RV32I-SFB-NEXT: # %bb.1: # %entry
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; RV32I-SFB-NEXT: qc.li a0, 65543
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; RV32I-SFB-NEXT: .LBB1_2: # %entry
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; RV32I-SFB-NEXT: ret
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;
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; RV64I-SFB-LABEL: select_example_2:
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; RV64I-SFB: # %bb.0: # %entry
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; RV64I-SFB-NEXT: mv a0, a1
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; RV64I-SFB-NEXT: lui a1, 16
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; RV64I-SFB-NEXT: beqz a2, .LBB1_2
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; RV64I-SFB-NEXT: # %bb.1: # %entry
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; RV64I-SFB-NEXT: addi a0, a1, 7
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; RV64I-SFB-NEXT: .LBB1_2: # %entry
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; RV64I-SFB-NEXT: ret
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entry:
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%sel = select i1 %x, i32 65543, i32 %b
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ret i32 %sel
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}
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define i32 @select_example_3(i32 %a, i32 %b, i1 zeroext %x, i32 %y) {
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; RV32I-LABEL: select_example_3:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: bnez a2, .LBB2_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: mv a0, a1
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB2_2:
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; RV32I-NEXT: qc.e.li a0, 4198928
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; RV32I-NEXT: ret
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;
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; RV64I-LABEL: select_example_3:
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; RV64I: # %bb.0: # %entry
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; RV64I-NEXT: bnez a2, .LBB2_2
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; RV64I-NEXT: # %bb.1: # %entry
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; RV64I-NEXT: mv a0, a1
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; RV64I-NEXT: ret
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; RV64I-NEXT: .LBB2_2:
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; RV64I-NEXT: lui a0, 1025
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; RV64I-NEXT: addi a0, a0, 528
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; RV64I-NEXT: ret
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;
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; RV32I-SFB-LABEL: select_example_3:
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; RV32I-SFB: # %bb.0: # %entry
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; RV32I-SFB-NEXT: mv a0, a1
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; RV32I-SFB-NEXT: beqz a2, .LBB2_2
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; RV32I-SFB-NEXT: # %bb.1: # %entry
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; RV32I-SFB-NEXT: qc.e.li a0, 4198928
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; RV32I-SFB-NEXT: .LBB2_2: # %entry
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; RV32I-SFB-NEXT: ret
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;
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; RV64I-SFB-LABEL: select_example_3:
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; RV64I-SFB: # %bb.0: # %entry
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; RV64I-SFB-NEXT: mv a0, a1
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; RV64I-SFB-NEXT: lui a1, 1025
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; RV64I-SFB-NEXT: beqz a2, .LBB2_2
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; RV64I-SFB-NEXT: # %bb.1: # %entry
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; RV64I-SFB-NEXT: addi a0, a1, 528
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; RV64I-SFB-NEXT: .LBB2_2: # %entry
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; RV64I-SFB-NEXT: ret
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entry:
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%sel = select i1 %x, i32 4198928, i32 %b
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ret i32 %sel
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}
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