derek.holloway
7502bf64a4
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65 lines
2.2 KiB
LLVM
65 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+xandesbfhcvt -target-abi ilp32f \
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; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,XANDESBFHCVT %s
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; RUN: llc -mtriple=riscv32 -mattr=+zfh,+xandesbfhcvt -target-abi ilp32f \
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; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,ZFH %s
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; RUN: llc -mtriple=riscv64 -mattr=+xandesbfhcvt -target-abi lp64f \
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; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,XANDESBFHCVT %s
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; RUN: llc -mtriple=riscv64 -mattr=+zfh,+xandesbfhcvt -target-abi lp64f \
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; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,ZFH %s
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define float @fcvt_s_bf16(bfloat %a) nounwind {
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; CHECK-LABEL: fcvt_s_bf16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nds.fcvt.s.bf16 fa0, fa0
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; CHECK-NEXT: ret
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%1 = fpext bfloat %a to float
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ret float %1
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}
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define bfloat @fcvt_bf16_s(float %a) nounwind {
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; CHECK-LABEL: fcvt_bf16_s:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nds.fcvt.bf16.s fa0, fa0
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; CHECK-NEXT: ret
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%1 = fptrunc float %a to bfloat
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ret bfloat %1
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}
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; Check load and store to bf16.
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define void @loadstorebf16(ptr %bf, ptr %sf) nounwind {
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; XANDESBFHCVT-LABEL: loadstorebf16:
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; XANDESBFHCVT: # %bb.0: # %entry
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; XANDESBFHCVT-NEXT: lhu a2, 0(a0)
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; XANDESBFHCVT-NEXT: lui a3, 1048560
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; XANDESBFHCVT-NEXT: or a2, a2, a3
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; XANDESBFHCVT-NEXT: fmv.w.x fa5, a2
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; XANDESBFHCVT-NEXT: nds.fcvt.s.bf16 fa5, fa5
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; XANDESBFHCVT-NEXT: fsw fa5, 0(a1)
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; XANDESBFHCVT-NEXT: flw fa5, 0(a1)
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; XANDESBFHCVT-NEXT: nds.fcvt.bf16.s fa5, fa5
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; XANDESBFHCVT-NEXT: fmv.x.w a1, fa5
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; XANDESBFHCVT-NEXT: sh a1, 0(a0)
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; XANDESBFHCVT-NEXT: ret
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;
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; ZFH-LABEL: loadstorebf16:
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; ZFH: # %bb.0: # %entry
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; ZFH-NEXT: flh fa5, 0(a0)
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; ZFH-NEXT: nds.fcvt.s.bf16 fa5, fa5
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; ZFH-NEXT: fsw fa5, 0(a1)
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; ZFH-NEXT: flw fa5, 0(a1)
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; ZFH-NEXT: nds.fcvt.bf16.s fa5, fa5
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; ZFH-NEXT: fsh fa5, 0(a0)
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; ZFH-NEXT: ret
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entry:
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%0 = load bfloat, ptr %bf, align 2
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%1 = fpext bfloat %0 to float
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store volatile float %1, ptr %sf, align 4
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%2 = load float, ptr %sf, align 4
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%3 = fptrunc float %2 to bfloat
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store volatile bfloat %3, ptr %bf, align 2
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ret void
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}
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