derek.holloway
7502bf64a4
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803 lines
24 KiB
LLVM
803 lines
24 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; Test that we are able to generate the Xqcics instructions
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; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefixes=RV32I
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; RUN: llc -mtriple=riscv32 -mattr=+xqcics -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefixes=RV32IXQCICS
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; RUN: llc -mtriple=riscv32 -mattr=+xqcics,+xqcicm -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefixes=RV32IXQCICM
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; RUN: llc -mtriple=riscv32 -mattr=+xqcicm,+xqcics,+xqcicli,+zca,+short-forward-branch-ialu,+conditional-cmv-fusion -verify-machineinstrs < %s \
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; RUN: | FileCheck %s --check-prefixes=RV32IXQCI
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define i32 @select_cc_example_eq_s1(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_eq_s1:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: andi a1, a0, 1
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: bnez a1, .LBB0_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: li a0, 12
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; RV32I-NEXT: .LBB0_2: # %entry
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_eq_s1:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: andi a0, a0, 1
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; RV32IXQCICS-NEXT: qc.selectinei a0, 0, a2, 12
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_eq_s1:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: andi a0, a0, 1
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; RV32IXQCICM-NEXT: qc.selectinei a0, 0, a2, 12
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_eq_s1:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: andi a0, a0, 1
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; RV32IXQCI-NEXT: qc.selectinei a0, 0, a2, 12
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; RV32IXQCI-NEXT: ret
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entry:
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%cond_trunc = trunc i32 %a to i1
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%sel = select i1 %cond_trunc, i32 %x, i32 12
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ret i32 %sel
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}
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define i32 @select_cc_example_eq_s2(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_eq_s2:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: andi a1, a0, 1
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; RV32I-NEXT: bnez a1, .LBB1_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB1_2:
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; RV32I-NEXT: li a0, 12
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_eq_s2:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: andi a0, a0, 1
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; RV32IXQCICS-NEXT: qc.selectieqi a0, 0, a2, 12
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_eq_s2:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: andi a0, a0, 1
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; RV32IXQCICM-NEXT: qc.selectieqi a0, 0, a2, 12
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_eq_s2:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: andi a0, a0, 1
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; RV32IXQCI-NEXT: qc.selectieqi a0, 0, a2, 12
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; RV32IXQCI-NEXT: ret
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entry:
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%cond_trunc = trunc i32 %a to i1
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%sel = select i1 %cond_trunc, i32 12, i32 %x
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ret i32 %sel
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}
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define i32 @select_cc_example_eq_s3(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_eq_s3:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: andi a0, a0, 1
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; RV32I-NEXT: bnez a0, .LBB2_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: li a0, 25
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB2_2:
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; RV32I-NEXT: li a0, 12
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_eq_s3:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: andi a0, a0, 1
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; RV32IXQCICS-NEXT: li a1, 25
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; RV32IXQCICS-NEXT: qc.selectieqi a0, 0, a1, 12
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_eq_s3:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: andi a0, a0, 1
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; RV32IXQCICM-NEXT: li a1, 25
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; RV32IXQCICM-NEXT: qc.selectieqi a0, 0, a1, 12
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_eq_s3:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: andi a0, a0, 1
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; RV32IXQCI-NEXT: li a1, 25
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; RV32IXQCI-NEXT: qc.selectieqi a0, 0, a1, 12
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; RV32IXQCI-NEXT: ret
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entry:
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%cond_trunc = trunc i32 %a to i1
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%sel = select i1 %cond_trunc, i32 12, i32 25
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ret i32 %sel
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}
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define i32 @select_cc_example_eq(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_eq:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: li a1, 11
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; RV32I-NEXT: beq a0, a1, .LBB3_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: mv a2, a3
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; RV32I-NEXT: .LBB3_2: # %entry
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_eq:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selecteqi a0, 11, a2, a3
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_eq:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.mvnei a2, a0, 11, a3
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; RV32IXQCICM-NEXT: mv a0, a2
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_eq:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: qc.mvnei a2, a0, 11, a3
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; RV32IXQCI-NEXT: mv a0, a2
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; RV32IXQCI-NEXT: ret
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entry:
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%cmp = icmp eq i32 %a, 11
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%sel = select i1 %cmp, i32 %x, i32 %y
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ret i32 %sel
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}
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define i32 @select_cc_example_eq_c(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_eq_c:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: li a1, 11
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; RV32I-NEXT: beq a0, a1, .LBB4_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: mv a2, a3
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; RV32I-NEXT: .LBB4_2: # %entry
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_eq_c:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selecteqi a0, 11, a2, a3
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_eq_c:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.mvnei a2, a0, 11, a3
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; RV32IXQCICM-NEXT: mv a0, a2
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_eq_c:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: qc.mvnei a2, a0, 11, a3
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; RV32IXQCI-NEXT: mv a0, a2
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; RV32IXQCI-NEXT: ret
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entry:
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%cmp = icmp eq i32 11, %a
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%sel = select i1 %cmp, i32 %x, i32 %y
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ret i32 %sel
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}
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define i32 @select_cc_example_ne(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_ne:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: li a1, 11
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; RV32I-NEXT: bne a0, a1, .LBB5_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: mv a2, a3
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; RV32I-NEXT: .LBB5_2: # %entry
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_ne:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selectnei a0, 11, a2, a3
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_ne:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.mveqi a2, a0, 11, a3
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; RV32IXQCICM-NEXT: mv a0, a2
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_ne:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: qc.mveqi a2, a0, 11, a3
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; RV32IXQCI-NEXT: mv a0, a2
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; RV32IXQCI-NEXT: ret
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entry:
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%cmp = icmp ne i32 %a, 11
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%sel = select i1 %cmp, i32 %x, i32 %y
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ret i32 %sel
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}
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define i32 @select_cc_example_ne_c(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_ne_c:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: li a1, 11
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; RV32I-NEXT: bne a0, a1, .LBB6_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: mv a2, a3
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; RV32I-NEXT: .LBB6_2: # %entry
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_ne_c:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selectnei a0, 11, a2, a3
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_ne_c:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.mveqi a2, a0, 11, a3
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; RV32IXQCICM-NEXT: mv a0, a2
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_ne_c:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: qc.mveqi a2, a0, 11, a3
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; RV32IXQCI-NEXT: mv a0, a2
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; RV32IXQCI-NEXT: ret
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entry:
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%cmp = icmp ne i32 11, %a
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%sel = select i1 %cmp, i32 %x, i32 %y
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ret i32 %sel
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}
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define i32 @select_cc_example_eqi(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_eqi:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: beq a0, a1, .LBB7_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: li a2, 11
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; RV32I-NEXT: .LBB7_2: # %entry
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_eqi:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selectieq a0, a1, a2, 11
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_eqi:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.selectieq a0, a1, a2, 11
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_eqi:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: qc.selectieq a0, a1, a2, 11
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; RV32IXQCI-NEXT: ret
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entry:
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%cmp = icmp eq i32 %a, %b
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%sel = select i1 %cmp, i32 %x, i32 11
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ret i32 %sel
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}
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define i32 @select_cc_example_eqi_c(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_eqi_c:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: bne a0, a1, .LBB8_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: li a2, 11
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; RV32I-NEXT: .LBB8_2: # %entry
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_eqi_c:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selectine a0, a1, a2, 11
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_eqi_c:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.selectine a0, a1, a2, 11
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_eqi_c:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: qc.selectine a0, a1, a2, 11
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; RV32IXQCI-NEXT: ret
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entry:
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%cmp = icmp eq i32 %a, %b
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%sel = select i1 %cmp, i32 11, i32 %x
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ret i32 %sel
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}
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define i32 @select_cc_example_nei(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_nei:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: bne a0, a1, .LBB9_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: li a2, 11
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; RV32I-NEXT: .LBB9_2: # %entry
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_nei:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selectine a0, a1, a2, 11
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_nei:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.selectine a0, a1, a2, 11
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; RV32IXQCICM-NEXT: ret
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;
|
|
; RV32IXQCI-LABEL: select_cc_example_nei:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectine a0, a1, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp ne i32 %a, %b
|
|
%sel = select i1 %cmp, i32 %x, i32 11
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_nei_c(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_nei_c:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: beq a0, a1, .LBB10_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB10_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_nei_c:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectieq a0, a1, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_nei_c:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectieq a0, a1, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_nei_c:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectieq a0, a1, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp ne i32 %a, %b
|
|
%sel = select i1 %cmp, i32 11, i32 %x
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_ieqi(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_ieqi:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: li a1, 12
|
|
; RV32I-NEXT: beq a0, a1, .LBB11_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB11_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_ieqi:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_ieqi:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_ieqi:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp eq i32 %a, 12
|
|
%sel = select i1 %cmp, i32 %x, i32 11
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_ieqi_c1(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_ieqi_c1:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: li a1, 12
|
|
; RV32I-NEXT: beq a0, a1, .LBB12_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB12_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_ieqi_c1:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_ieqi_c1:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_ieqi_c1:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp eq i32 12, %a
|
|
%sel = select i1 %cmp, i32 %x, i32 11
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_ieqi_c2(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_ieqi_c2:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: li a1, 12
|
|
; RV32I-NEXT: bne a0, a1, .LBB13_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB13_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_ieqi_c2:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_ieqi_c2:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_ieqi_c2:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp eq i32 %a, 12
|
|
%sel = select i1 %cmp, i32 11, i32 %x
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_ieqi_c3(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_ieqi_c3:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: li a1, 12
|
|
; RV32I-NEXT: bne a0, a1, .LBB14_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB14_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_ieqi_c3:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_ieqi_c3:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_ieqi_c3:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp eq i32 12, %a
|
|
%sel = select i1 %cmp, i32 11, i32 %x
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_inei(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_inei:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: li a1, 12
|
|
; RV32I-NEXT: bne a0, a1, .LBB15_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB15_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_inei:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_inei:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_inei:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp ne i32 %a, 12
|
|
%sel = select i1 %cmp, i32 %x, i32 11
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_inei_c1(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_inei_c1:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: li a1, 12
|
|
; RV32I-NEXT: bne a0, a1, .LBB16_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB16_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_inei_c1:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_inei_c1:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_inei_c1:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectinei a0, 12, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp ne i32 12, %a
|
|
%sel = select i1 %cmp, i32 %x, i32 11
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_inei_c2(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_inei_c2:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: li a1, 12
|
|
; RV32I-NEXT: beq a0, a1, .LBB17_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB17_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_inei_c2:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_inei_c2:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_inei_c2:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp ne i32 %a, 12
|
|
%sel = select i1 %cmp, i32 11, i32 %x
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_inei_c3(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_inei_c3:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: li a1, 12
|
|
; RV32I-NEXT: beq a0, a1, .LBB18_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB18_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_inei_c3:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_inei_c3:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_inei_c3:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectieqi a0, 12, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp ne i32 12, %a
|
|
%sel = select i1 %cmp, i32 11, i32 %x
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_eqii(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_eqii:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: beq a0, a1, .LBB19_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a0, 11
|
|
; RV32I-NEXT: ret
|
|
; RV32I-NEXT: .LBB19_2:
|
|
; RV32I-NEXT: li a0, 13
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_eqii:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectiieq a0, a1, 13, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_eqii:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectiieq a0, a1, 13, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_eqii:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectiieq a0, a1, 13, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp eq i32 %a, %b
|
|
%sel = select i1 %cmp, i32 13, i32 11
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_neii(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_neii:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: bne a0, a1, .LBB20_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a0, 11
|
|
; RV32I-NEXT: ret
|
|
; RV32I-NEXT: .LBB20_2:
|
|
; RV32I-NEXT: li a0, 13
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_neii:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectiine a0, a1, 13, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_neii:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectiine a0, a1, 13, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_neii:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectiine a0, a1, 13, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp ne i32 %a, %b
|
|
%sel = select i1 %cmp, i32 13, i32 11
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_eq1(i32 %a, i32 %b, i32 %x, i32 %y) {
|
|
; RV32I-LABEL: select_cc_example_eq1:
|
|
; RV32I: # %bb.0: # %entry
|
|
; RV32I-NEXT: beq a1, a0, .LBB21_2
|
|
; RV32I-NEXT: # %bb.1: # %entry
|
|
; RV32I-NEXT: li a2, 11
|
|
; RV32I-NEXT: .LBB21_2: # %entry
|
|
; RV32I-NEXT: mv a0, a2
|
|
; RV32I-NEXT: ret
|
|
;
|
|
; RV32IXQCICS-LABEL: select_cc_example_eq1:
|
|
; RV32IXQCICS: # %bb.0: # %entry
|
|
; RV32IXQCICS-NEXT: qc.selectieq a0, a1, a2, 11
|
|
; RV32IXQCICS-NEXT: ret
|
|
;
|
|
; RV32IXQCICM-LABEL: select_cc_example_eq1:
|
|
; RV32IXQCICM: # %bb.0: # %entry
|
|
; RV32IXQCICM-NEXT: qc.selectieq a0, a1, a2, 11
|
|
; RV32IXQCICM-NEXT: ret
|
|
;
|
|
; RV32IXQCI-LABEL: select_cc_example_eq1:
|
|
; RV32IXQCI: # %bb.0: # %entry
|
|
; RV32IXQCI-NEXT: qc.selectieq a0, a1, a2, 11
|
|
; RV32IXQCI-NEXT: ret
|
|
entry:
|
|
%cmp = icmp eq i32 %b, %a
|
|
%sel = select i1 %cmp, i32 %x, i32 11
|
|
ret i32 %sel
|
|
}
|
|
|
|
define i32 @select_cc_example_ne1(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_ne1:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: bne a1, a0, .LBB22_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: li a2, 11
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; RV32I-NEXT: .LBB22_2: # %entry
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; RV32I-NEXT: mv a0, a2
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_ne1:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selectine a0, a1, a2, 11
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_ne1:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.selectine a0, a1, a2, 11
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_ne1:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: qc.selectine a0, a1, a2, 11
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; RV32IXQCI-NEXT: ret
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entry:
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%cmp = icmp ne i32 %b, %a
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%sel = select i1 %cmp, i32 %x, i32 11
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ret i32 %sel
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}
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define i32 @select_cc_example_eq2(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_eq2:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: beq a1, a0, .LBB23_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: li a0, 11
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB23_2:
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; RV32I-NEXT: li a0, 15
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_eq2:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selectiieq a0, a1, 15, 11
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_eq2:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.selectiieq a0, a1, 15, 11
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_eq2:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: qc.selectiieq a0, a1, 15, 11
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; RV32IXQCI-NEXT: ret
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entry:
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%cmp = icmp eq i32 %b, %a
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%sel = select i1 %cmp, i32 15, i32 11
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ret i32 %sel
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}
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define i32 @select_cc_example_ne2(i32 %a, i32 %b, i32 %x, i32 %y) {
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; RV32I-LABEL: select_cc_example_ne2:
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; RV32I: # %bb.0: # %entry
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; RV32I-NEXT: bne a1, a0, .LBB24_2
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; RV32I-NEXT: # %bb.1: # %entry
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; RV32I-NEXT: li a0, 11
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; RV32I-NEXT: ret
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; RV32I-NEXT: .LBB24_2:
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; RV32I-NEXT: li a0, 15
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; RV32I-NEXT: ret
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;
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; RV32IXQCICS-LABEL: select_cc_example_ne2:
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; RV32IXQCICS: # %bb.0: # %entry
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; RV32IXQCICS-NEXT: qc.selectiine a0, a1, 15, 11
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; RV32IXQCICS-NEXT: ret
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;
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; RV32IXQCICM-LABEL: select_cc_example_ne2:
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; RV32IXQCICM: # %bb.0: # %entry
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; RV32IXQCICM-NEXT: qc.selectiine a0, a1, 15, 11
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; RV32IXQCICM-NEXT: ret
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;
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; RV32IXQCI-LABEL: select_cc_example_ne2:
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; RV32IXQCI: # %bb.0: # %entry
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; RV32IXQCI-NEXT: qc.selectiine a0, a1, 15, 11
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; RV32IXQCI-NEXT: ret
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entry:
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%cmp = icmp ne i32 %b, %a
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%sel = select i1 %cmp, i32 15, i32 11
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ret i32 %sel
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}
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