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69 lines
1.4 KiB
LLVM
69 lines
1.4 KiB
LLVM
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
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;
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; Test that a spill/reload of a VR32/VR64 reg uses the FP opcode supporting
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; 20-bit displacement if needed and possible.
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define void @f1(i32 %arg, ...) {
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; CHECK-LABEL: f1:
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; CHECK-NOT: lay
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; CHECK: stdy %f0, 4400(%r15)
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bb:
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%i = alloca [4096 x i8]
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ret void
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}
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define void @f2(float %Arg) {
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; CHECK-LABEL: f2:
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; CHECK-NOT: lay
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; CHECK: stey %f0, 4172(%r15)
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bb:
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%i = alloca [1000 x float]
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%i2 = getelementptr inbounds [1000 x float], ptr %i, i64 0, i64 999
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br i1 undef, label %bb3, label %bb2
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bb2:
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store float %Arg , ptr %i2
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br label %bb3
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bb3:
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ret void
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}
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define void @f3(ptr %Dst) {
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; CHECK-LABEL: f3:
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; CHECK-NOT: lay
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; CHECK: ldy %f0, 4168(%r15)
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bb:
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%i = alloca [500 x double]
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br i1 undef, label %bb3, label %bb2
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bb2:
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%i12 = getelementptr inbounds [500 x double], ptr %i, i64 0, i64 499
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%i13 = load double, ptr %i12
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%i14 = fdiv double %i13, 0.000000e+00
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store double %i14, ptr %Dst
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br label %bb3
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bb3:
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ret void
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}
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define void @f4(ptr %Dst) {
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; CHECK-LABEL: f4:
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; CHECK-NOT: lay
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; CHECK: ley %f0, 4172(%r15)
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bb:
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%i = alloca [1000 x float]
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br i1 undef, label %bb3, label %bb2
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bb2:
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%i12 = getelementptr inbounds [1000 x float], ptr %i, i64 0, i64 999
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%i13 = load float, ptr %i12
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%i14 = fdiv float %i13, 0.000000e+00
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store float %i14, ptr %Dst
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br label %bb3
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bb3:
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ret void
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}
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